Chaojie He

Publication Activity (10 Years)

Years Active: 2023-2024
Publications (10 Years): 5

Top Topics

Floating Point Unit

Memory Bandwidth

Sparse Matrices

Computer Integrated Manufacturing

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE J. Solid State Circuits

Publications

Chaojie He, Zi Wang, Feibin Xiang, Zhuoyu Dai, Yifan He, Jinshan Yue, Yongpan Liu
LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity and Approximate Circuits Co-Design. IEEE Trans. Circuits Syst. II Express Briefs 71 (2) (2024)
Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. IEEE J. Solid State Circuits 59 (8) (2024)
Zi Wang, Jinshan Yue, Chaojie He, Zhuoyu Dai, Feibin Xiang, Zhaori Cong, Yifan He, Xiaoyu Feng, Yongpan Liu
A User-Friendly Fast and Accurate Simulation Framework for Non-Ideal Factors in Computing-in-Memory Architecture. ISCAS (2023)
Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. ISSCC (2023)
Zhuoyu Dai, Feibin Xiang, Chaojie He, Zi Wang, Woyu Zhang, Yi Li, Jinshan Yue, Dashan Shang
A Scalable Small-Footprint Time-Space-Pipelined Architecture for Reservoir Computing. IEEE Trans. Circuits Syst. II Express Briefs 70 (8) (2023)