Feibin Xiang

Publication Activity (10 Years)

Years Active: 2023-2024
Publications (10 Years): 4

Top Topics

Wide Dynamic Range

Graphical Interface

Pipelined Architecture

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Chaojie He, Zi Wang, Feibin Xiang, Zhuoyu Dai, Yifan He, Jinshan Yue, Yongpan Liu
LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity and Approximate Circuits Co-Design. IEEE Trans. Circuits Syst. II Express Briefs 71 (2) (2024)
Xiangqu Fu, Qirui Ren, Hao Wu, Feibin Xiang, Qing Luo, Jinshan Yue, Yong Chen, Feng Zhang
ViT: A CIM-Based High-Utilization Architecture With Dynamic Pruning and Two-Way Ping-Pong Macro for Vision Transformer. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Zi Wang, Jinshan Yue, Chaojie He, Zhuoyu Dai, Feibin Xiang, Zhaori Cong, Yifan He, Xiaoyu Feng, Yongpan Liu
A User-Friendly Fast and Accurate Simulation Framework for Non-Ideal Factors in Computing-in-Memory Architecture. ISCAS (2023)
Zhuoyu Dai, Feibin Xiang, Chaojie He, Zi Wang, Woyu Zhang, Yi Li, Jinshan Yue, Dashan Shang
A Scalable Small-Footprint Time-Space-Pipelined Architecture for Reservoir Computing. IEEE Trans. Circuits Syst. II Express Briefs 70 (8) (2023)