LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity and Approximate Circuits Co-Design.
Chaojie HeZi WangFeibin XiangZhuoyu DaiYifan HeJinshan YueYongpan LiuPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2024)
Keyphrases
- low power
- power dissipation
- logic circuits
- mixed signal
- power consumption
- high speed
- low cost
- vlsi circuits
- cmos technology
- digital signal processing
- low power consumption
- power reduction
- high power
- vlsi architecture
- analog to digital converter
- index structure
- delay insensitive
- wireless transmission
- wide dynamic range
- gate array
- single chip
- main memory
- real time