Weiwei Shan

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 70

Top Topics

Error Detection

Feature Extractor

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Yuqiang Cui, Lishuo Deng, Keran Li, Weiwei Shan
FLC-EDC: A Fast Low-Cost Error Detection and Correction Scheme for AVFS System Based on Flip-Flops Resampling in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71 (1) (2024)
Cai Li, Haochang Zhi, Kaiyue Yang, Junyi Qian, Zhihao Yan, Lixuan Zhu, Chao Chen, Xi Wang, Weiwei Shan
A 0.61-μW Fully Integrated Keyword-Spotting ASIC With Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN. IEEE J. Solid State Circuits 59 (3) (2024)
Jintao Li, Yanhan Zeng, Haochang Zhi, Jingci Yang, Weiwei Shan, Yongfu Li, Yun Li
Knowledge Transfer Framework for PVT Robustness in Analog Integrated Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (5) (2024)
Lishuo Deng, Zhengguo Shen, Zhuo Chen, Cai Li, Junyi Qian, Yuxuan Du, Kaize Zhou, Keran Li, Ruidong Li, Tuo Li, Xiaofeng Zou, Weiwei Shan
An Adaptive Wide-Voltage-Range Droop Detection and Protection System Assisted with Timing Error Detection in 28nm CMOS. CICC (2024)
Weiwei Shan, Kaize Zhou, Keran Li, Yuxuan Du, Zhuo Chen, Junyi Qian, Haitao Ge, Jun Yang, Xin Si
14.2 Proactive Voltage Droop Mitigation Using Dual-Proportional-Derivative Control Based on Current and Voltage Prediction Applied to a Multicore Processor in 28nm CMOS. ISSCC (2024)
An Guo, Xi Chen, Fangyuan Dong, Jinwu Chen, Zhihang Yuan, Xing Hu, Yuanpeng Zhang, Jingmin Zhang, Yuchen Tang, Zhican Zhang, Gang Chen, Dawei Yang, Zhaoyang Zhang, Lizheng Ren, Tianzhu Xiong, Bo Wang, Bo Liu, Weiwei Shan, Xinning Liu, Hao Cai, Guangyu Sun, Jun Yang, Xin Si
34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs. ISSCC (2024)
Yuxuan Du, Junyi Qian, Zhengguo Shen, Chengjun Wu, Weiwei Shan, Wang Xi
DSC-TRCP: Dynamically Self-Calibrating Tunable Replica Critical Paths Based Timing Monitoring for Variation Resilient Circuits. IEEE J. Solid State Circuits 59 (7) (2024)
Ke Xu, Jialin Sun, Yuchen Hu, Xinwei Fang, Weiwei Shan, Xi Wang, Zhe Jiang
MEIC: Re-thinking RTL Debug Automation using LLMs. CoRR (2024)
Yuchen Hu, Ke Xu, Jialin Sun, Xinwei Fang, Weiwei Shan, Xi Wang, Zhe Jiang
Make Each Iteration Count. ACM TUR-C (2024)
Yuqiang Cui, Weiwei Shan, Peng Cao
Ultra-low-power one-hot transmission-gate multiplexer (OTG-MUX) scalable into large fan-in circuits in 28 nm CMOS. Integr. 94 (2024)
An Guo, Xin Si, Xi Chen, Fangyuan Dong, Xingyu Pu, Dongqi Li, Yongliang Zhou, Lizheng Ren, Yeyang Xue, Xueshan Dong, Hui Gao, Yiran Zhang, Jingmin Zhang, Yuyao Kong, Tianzhu Xiong, Bo Wang, Hao Cai, Weiwei Shan, Jun Yang
A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs. ISSCC (2023)
Yizhi Ding, Haochang Zhi, Jintao Li, Zhuo Chen, Kaiyue Yang, Weiwei Shan
A Compact and Robust 28nm CMOS Temperature Sensor with Machine Learning Assisted Design for DVFS SoC. ICTA (2023)
Cai Li, Haochang Zhi, Long Chen, Kaiyue Yang, Junyi Qian, Zhihao Yan, Lixuan Zhu, Weiwei Shan
A 608nW Near-Microphone Keyword-Spotting Chip Using Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN in 28nm CMOS. CICC (2023)
Yuxuan Du, Zhuo Chen, Boyang Cheng, Weiwei Shan
Design and analysis of leading one/zero detector based approximate multipliers. Microelectron. J. 136 (2023)
Weiwei Shan, Junyi Qian, Lixuan Zhu, Jun Yang, Cheng Huang, Hao Cai
AAD-KWS: A Sub-μ W Keyword Spotting Chip With an Acoustic Activity Detector Embedded in MFCC and a Tunable Detection Window in 28-nm CMOS. IEEE J. Solid State Circuits 58 (3) (2023)
Zhuo Chen, Yuxuan Du, Boyang Cheng, Weiwei Shan
Design of high-efficiency complex multiplier for fault-tolerant computation. Integr. 90 (2023)
Zhengguo Shen, Junyi Qian, Keran Li, Ziyu Li, Lishuo Deng, Weiwei Shan
TEPD: A Compound Timing Detection of Both Data-Transition and Path-Activation for Reliable In-Situ Timing Error Detection and Correction in 28nm CMOS. A-SSCC (2023)
Yuxuan Du, Junyi Qian, Zhuo Chen, Weiwei Shan
An All-Digital, 1.92-7.32 mV/LSB, 0.5-2 GS/s Sample Rate, and 0-Latency Prediction Voltage Sensor With Dynamic PVT Calibration for Droop Detection and AVS System. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (12) (2023)
Yuxuan Du, Haitao Ge, Zhuo Chen, Kaize Zhou, Zhengguo Shen, Weiwei Shan
A 28nm All-Digital, 1.92-7.32mV/LSB, 0.5-2GS/s sample rate, 0-latency Voltage Sensor with Dynamic PVT Calibration for Wide-range Adaptive Voltage Scaling. CICC (2023)
Zhengguo Shen, Weiwei Shan, Yuxuan Du, Ziyu Li, Jun Yang
Beyond Eliminating Timing Margin: An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator Without Accuracy Loss. IEEE J. Solid State Circuits 58 (5) (2023)
Weiwei Shan, Yuqiang Cui, Wentao Dai, Xinning Liu, Jingjing Guo, Peng Cao, Jun Yang
An efficient path delay variability model for wide-voltage-range digital circuits. Sci. China Inf. Sci. 66 (2) (2023)
Hao Cai, Zhong-Jian Bian, Yaoru Hou, Yongliang Zhou, Jia-le Cui, Yanan Guo, Xiaoyun Tian, Bo Liu, Xin Si, Zhen Wang, Jun Yang, Weiwei Shan
A 28nm 2Mb STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell and 22.4 - 41.5TOPS/W for AI Inference. ISSCC (2023)
Lishuo Deng, Keran Li, Weiwei Shan
IVATS: A Leakage Reduction Technique Based on Input Vector Analysis and Transistor Stacking in CMOS Circuits. ISCAS (2023)
Jintao Li, Haochang Zhi, Weiwei Shan, Yongfu Li, Yanhan Zeng, Yun Li
Multi-Task Evolutionary to PVT Knowledge Transfer for Analog Integrated Circuit Optimization. ICCAD (2023)
Long Chen, Cai Li, Tao Wang, Junyi Qian, Weiwei Shan
A 1.23μJ/Inference, All-Digital Shuffle-Type Group-CNN Accelerator in 28nm CMOS With 85.8% Accuracy on CIFAR-10. IEEE Trans. Circuits Syst. II Express Briefs 70 (1) (2023)
Ruixin Mao, Sixu Li, Zhaomin Zhang, Zihan Xia, Jianbiao Xiao, Zixuan Zhu, Jiahao Liu, Weiwei Shan, Liang Chang, Jun Zhou
An Ultra-Energy-Efficient and High Accuracy ECG Classification Processor With SNN Inference Assisted by On-Chip ANN Learning. IEEE Trans. Biomed. Circuits Syst. 16 (5) (2022)
Kaize Zhou, Dejian Li, Chongfei Shen, Yuxuan Du, Zhuo Chen, Weiwei Shan
A Voltage Error Quantizer For Digital Low Dropout Regulators With Fast Transient Response and Low Steady-State Error. ICTA (2022)
Yuqiang Cui, Weiwei Shan
A High-Precision PVT-Tolerance Adaptive Clock Circuit Over Wide Frequencies in 28nm CMOS. APCCAS (2022)
Jiahao Liu, Zirui Zhong, Yong Zhou, Hui Qiu, Jianbiao Xiao, Jiajing Fan, Zhaomin Zhang, Sixu Li, Yiming Xu, Siqi Yang, Weiwei Shan, Shuisheng Lin, Liang Chang, Jun Zhou
An energy-efficient seizure detection processor using event-driven multi-stage CNN classification and segmented data processing with adaptive channel selection. DAC (2022)
Haitao Ge, Weiwei Shan, Yicheng Lu, Jun Yang
A 28nm, 4.69TOPS/W Training, 2.34µJ/lmage Inference, on-chip Training Accelerator with Inference-compatible Back Propagation. ICTA (2022)
Minhao Yang, Hongjie Liu, Weiwei Shan, Jun Zhang, Ilya Kiselev, Sang Joon Kim, Christian C. Enz, Mingoo Seok
Nanowatt Acoustic Inference Sensing Exploiting Nonlinear Analog Feature Extraction. IEEE J. Solid State Circuits 56 (10) (2021)
Zhikuang Cai, Boyang Cheng, Yuxuan Du, Xinchao Shang, Weiwei Shan
A Time-Domain Binary CNN Engine With Error-Detection-Based Resilience in 28nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68 (9) (2021)
Weiwei Shan, Minhao Yang, Tao Wang, Yicheng Lu, Hao Cai, Lixuan Zhu, Jiaming Xu, Chengjun Wu, Longxing Shi, Jun Yang
A 510-nW Wake-Up Keyword-Spotting Chip Using Serial-FFT-Based MFCC and Binarized Depthwise Separable CNN in 28-nm CMOS. IEEE J. Solid State Circuits 56 (1) (2021)
Lixuan Zhu, Weiwei Shan, Jiaming Xu, Yicheng Lu
AAD-KWS: a sub-$\mu\mathrm{W}$ keyword spotting chip with a zero-cost, acoustic activity detector from a 170nW MFCC feature extractor in 28nm CMOS. ESSDERC (2021)
Yuqiang Cui, Chengjun Wu, Ziyu Li, Weiwei Shan
Energy-Efficient Design of Large Fan-in Dynamic One-hot Multiplexer in 28nm CMOS Technology. ICTA (2021)
Lixuan Zhu, Weiwei Shan, Jiaming Xu, Yicheng Lu
AAD-KWS: a sub-µW keyword spotting chip with a zero-cost, acoustic activity detector from a 170nW MFCC feature extractor in 28nm CMOS. ESSCIRC (2021)
Ziyu Li, Weiwei Shan, Chengjun Wu, Haitao Ge, Jun Yang
An Efficient and Reliable Negative Margin Timing Error Detection for Neural Network Accelerator without Accuracy Loss in 28nm CMOS. A-SSCC (2021)
Kaiyue Yang, Lixuan Zhu, Weiwei Shan
Design of an ultra-low Power MFCC Feature Extraction Circuit with Embedded Speech Activity Detector. ICTA (2021)
Yuxuan Du, Xinchao Shang, Weiwei Shan
An Energy-Efficient Time-Domain Binary Neural Network Accelerator with Error-Detection in 28nm CMOS. APCCAS (2020)
Weiwei Shan, Minhao Yang, Jiaming Xu, Yicheng Lu, Shuai Zhang, Tao Wang, Jun Yang, Longxing Shi, Mingoo Seok
14.1 A 510nW 0.41V Low-Memory Low-Computation Keyword-Spotting Chip Using Serial FFT-Based MFCC and Binarized Depthwise Separable Convolutional Neural Network in 28nm CMOS. ISSCC (2020)
Xinchao Shang, Minyi Lu, Chengjun Wu, Yiming Xiang, Jiaming Xu, Weiwei Shan
A Wide-Voltage-Range Transition-Detector With In-Situ Timing-Error Detection and Correction Based on Pulsed-Latch Design in 28 nm CMOS. IEEE Trans. Circuits Syst. (11) (2020)
Weiwei Shan, Shuai Zhang, Jiaming Xu, Minyi Lu, Longxing Shi, Jun Yang
Machine Learning Assisted Side-Channel-Attack Countermeasure and Its Application on a 28-nm AES Circuit. IEEE J. Solid State Circuits 55 (3) (2020)
Weiwei Shan, Wentao Dai, Chuan Zhang, Hao Cai, Peiye Liu, Jun Yang, Longxing Shi
TG-SPP: A One-Transmission-Gate Short-Path Padding for Wide-Voltage-Range Resilient Circuits in 28-nm CMOS. IEEE J. Solid State Circuits 55 (5) (2020)
Lixuan Zhu, Lixing Li, Weiwei Shan
Design of Approximate Complex Constant Multiplier for Fast Fourier Transform in 28nm CMOS. ICTA (2020)
Weiwei Shan, Wentao Dai, Liang Wan, Minyi Lu, Longxing Shi, Mingoo Seok, Jun Yang
A Bi-Directional, Zero-Latency Adaptive Clocking Circuit in a 28-nm Wide AVFS System. IEEE J. Solid State Circuits 55 (3) (2020)
Martin Shan, Daniel Duckwitz, Weiwei Shan
Using Wind Turbines for Providing Defined Levels of Synthetic Inertia in System Split Scenarios. ISGT-Europe (2020)
Weiwei Shan, Ao Fan, Jiaming Xu, Jun Yang, Mingoo Seok
A 923 Gbps/W, 113-Cycle, 2-Sbox Energy-efficient AES Accelerator in 28nm CMOS. VLSI Circuits (2019)
Chengjun Wu, Weiwei Shan, Jiaming Xu
ynamic Adaptation of Approximate Bit-width for CNNs based on Quantitative Error Resilience. NANOARCH (2019)
Weiwei Shan, Shogo Muramatsu, Akira Oshima, Hiroyoshi Yamada
Successive Stripe Artifact Removal Based on Robust PCA for Millimeter Wave Automotive Radar Image. APSIPA (2019)
Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang, Weisheng Zhao
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2019)
Weiwei Shan, Xinchao Shang, Xing Wan, Hao Cai, Chuan Zhang, Jun Yang
A Wide-Voltage-Range Half-Path Timing Error-Detection System With a 9-Transistor Transition-Detector in 40-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2019)
Yicheng Lu, Weiwei Shan, Jiaming Xu
A Depthwise Separable Convolution Neural Network for Small-footprint Keyword Spotting Using Approximate MAC Unit and Streaming Convolution Reuse. APCCAS (2019)
Hao Cai, Menglin Han, Weiwei Shan, Jun Yang, You Wang, Wang Kang, Weisheng Zhao
Voltage-Controlled Magnetoelectric Memory Bit-cell Design With Assisted Body-bias in FD-SOI. ACM Great Lakes Symposium on VLSI (2019)
Tao Wang, Weiwei Shan
An Energy-Efficient In-Memory BNN Architecture With Time-Domain Analog and Digital Mixed-Signal Processing. NANOARCH (2019)
Wentao Dai, Peiye Liu, Weiwei Shan
Short-path Padding Method for Timing Error Resilient Circuits based on Transmission Gates Insertion. ACM Great Lakes Symposium on VLSI (2018)
Jiaming Xu, Ao Fan, Minyi Lu, Weiwei Shan
Differential Power Analysis of 8-Bit Datapath AES for IoT Applications. TrustCom/BigDataSE (2018)
Minyi Lu, Ao Fan, Jiaming Xu, Weiwei Shan
A Compact, Lightweight and Low-Cost 8-Bit Datapath AES Circuit for IoT Applications in 28nm CMOS. TrustCom/BigDataSE (2018)
Wentao Dai, Weiwei Shan, Xinchao Shang, Xinning Liu, Hao Cai, Jun Yang
HTD: A Light-Weight Holosymmetrical Transition Detector for Wide-Voltage-Range Variation Resilient ICs. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2018)
Aiguo Bu, Wentao Dai, Minyi Lu, Hao Cai, Weiwei Shan
Correlation-Based Electromagnetic Analysis Attack Using Haar Wavelet Reconstruction with Low-Pass Filtering on an FPGA Implementaion of AES. TrustCom/BigDataSE (2018)
Weiwei Shan, Xinning Liu, Minyi Lu, Liang Wan, Jun Yang
A Low-Overhead Timing Monitoring Technique for Variation-Tolerant Near-Threshold Digital Integrated Circuits. IEEE Access 6 (2018)
Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Weiwei Shan, Jun Yang, Weisheng Zhao
Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques. ISCAS (2018)
Xinchao Shang, Weiwei Shan, Xinning Liu
Design and Implementation of a Reconfigurable Cryptographic Coprocessor with Multiple Side-Channel Attacks Countermeasures. J. Circuits Syst. Comput. 27 (11) (2018)
Weiwei Shan, Xinchao Shang, Longxing Shi, Wentao Dai, Jun Yang
Timing Error Prediction AVFS With Detection Window Tuning for Wide-Operating-Range ICs. IEEE Trans. Circuits Syst. II Express Briefs (7) (2018)
Weiwei Shan, Liang Wan, Xinning Liu, Xinchao Shang, Wentao Dai, Shuai Shao, Jun Yang, Longxing Shi
A Low Overhead, Within-a-Cycle Adaptive Clock Stretching Circuit With Wide Operating Range in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs (11) (2018)
Xinchao Shang, Weiwei Shan, Jiaming Xu, Minyi Lu, Yiming Xiang, Longxing Shi, Jun Yang
A 0.46V-1.1V Transition-Detector with In-Situ Timing-Error Detection and Correction Based on Pulsed-Latch Design in AES Accelerator. A-SSCC (2018)
Xinchao Shang, Weiwei Shan, Longxing Shi, Xing Wan, Jun Yang
A 0.44V-1.1V 9-transistor transition-detector and half-path error detection technique for low power applications. A-SSCC (2017)
Weiwei Shan, Xinning Liu, Minyi Lu, Shuai Shao, Zhikuang Cai, Jun Yang
An improved timing error prediction monitor for wide adaptive frequency scaling. IEICE Electron. Express 14 (21) (2017)
Weiwei Shan, Longxing Shi, Jun Yang
In-Situ Timing Monitor-Based Adaptive Voltage Scaling System for Wide-Voltage-Range Applications. IEEE Access 5 (2017)
Wentao Dai, Weiwei Shan, Xinning Liu, Jun Yang
HTD: A light-weight holosymmetrical transition detector based in-situ timing monitoring technique for wide-voltage-range in 40nm CMOS. A-SSCC (2017)
Weiwei Shan, Wentao Dai, Youhua Shi, Peng Cao, Xiaoyan Xiang
Timing monitoring paths selection for wide voltage IC. IEICE Electron. Express 13 (8) (2016)
Weiwei Shan, Xingyuan Fu, Zhipeng Xu
A Secure Reconfigurable Crypto IC With Countermeasures Against SPA, DPA, and EMA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (7) (2015)
Weiwei Shan, Longxing Shi, Xingyuan Fu, Xiao Zhang, Chaoxuan Tian, Zhipeng Xu, Jun Yang, Jie Li
A Side-channel Analysis Resistant Reconfigurable Cryptographic Coprocessor Supporting Multiple Block Cipher Algorithms. DAC (2014)
Weiwei Shan, Zhipeng Xu
Timing error prediction based adaptive voltage scaling for dynamic variation tolerance. APCCAS (2014)
Weiwei Shan, Xiao Zhang, Xingyuan Fu, Peng Cao
VLSI design of a reconfigurable S-box based on memory sharing method. IEICE Electron. Express 11 (1) (2014)
Xin Chen, Ning Wu, Wei Hu, Weiwei Shan
BIST design of power switch. IEICE Electron. Express 10 (15) (2013)
Weiwei Shan, Xin Chen, Bo Li, Peng Cao, Jie Li, Gugang Gao, Longxing Shi
Evaluation of Correlation Power Analysis Resistance and Its Application on Asymmetric Mask Protected Data Encryption Standard Hardware. IEEE Trans. Instrum. Meas. 62 (10) (2013)
Weiwei Shan, Haolin Gu, Bo Li, Xiaoqing Wu, Haikun Jin, Yintao Guo, Peng Cao
An improved timing monitor for deep dynamic voltage scaling system. IEICE Electron. Express 10 (6) (2013)
Zhikuang Cai, Haobo Xu, Shixuan Que, Weiwei Shan, Jun Yang
On-chip long-term jitter measurement for PLL based on undersampling technique. IEICE Electron. Express 10 (24) (2013)
Jun Yang, Weiwei Shan, Junyin Liu, Huafang Sun
Implementation of correlation power analysis attack on an FPGA DES design. Int. J. Inf. Commun. Technol. 5 (3/4) (2013)
Jie Li, Xinxiang Ke, Peng Cao, Weiwei Shan
A New Approach to Implement Discrete Wavelet Transform on Coarse-Grained Reconfigurable Architecture. CyberC (2012)
Peng Cao, Huiyan Jiang, Bo Liu, Weiwei Shan
Memory Bandwidth Optimization Strategy of Coarse-Grained Reconfigurable Architecture. CyberC (2012)
Peng Cao, Yong Cai, Bo Liu, Weiwei Shan
Configuration Cache Management for Coarse-Grained Reconfigurable Architecture with Multi-Array. CyberC (2012)
Jie Li, Yuxiang Lv, Huafang Sun, Weiwei Shan
A Power Analysis Resistant DES Cryptographic Algorithm and Its Hardware Design. ICDMA (2012)
Xuexiang Wang, Weiwei Shan, Hao Liu
Uniform SystemC Co-Simulation Methodology for System-on-Chip Designs. CyberC (2012)
Weiwei Shan, Xin Chen
A Novel Combined Proportional-Derivative Control for Electrostatic MEMS Mirror Actuation. IEICE Trans. Electron. (9) (2011)
Weiwei Shan, Yan Liang, Dongming Jin
Cmos Circuit Design of a Takagi-Sugeno Fuzzy Logic Controller. J. Circuits Syst. Comput. 18 (4) (2009)
Weiwei Shan, Xiqun Zhu, Yuan Ma
Adaptive Fuzzy Logic Controller and Its Application in MEMS Mirror Actuation Feedback Control. IDEAL (2009)
Weiwei Shan, Yuan Ma, Robert W. Newcomb, Dongming Jin
Analog Circuit Implementation of a Variable Universe Adaptive Fuzzy Logic Controller. IEEE Trans. Circuits Syst. II Express Briefs (10) (2008)
Weiwei Shan, Dongming Jin, Weiwei Jin, Zhihao Xu
VLSI Implementation of a Self-tuning Fuzzy Controller Based on Variable Universe of Discourse. FSKD (1) (2005)