Bo Liu

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 59

Top Topics

Speech Recognition

Keyword Spotting

Top Venues

IEICE Electron. Express

Publications

Rong Zhou, Bo Liu, Xin Si, Hao Cai
Complementary Series-connected STT-MTJ for Time-based Computing-in-Memory. ISCAS (2024)
Xuanhao Zhang, Hui Kou, Chenjie Xia, Hao Cai, Bo Liu
Small-Footprint Automatic Speech Recognition System using Two-Stage Transfer Learning based Symmetrized Ternary Weight Network. ICASSP (2024)
Yu Gong, Bo Liu, Hao Cai, Longxing Shi, Weiqiang Liu
VoAD: A Sub-μW Multiscene Voice Activity Detector Deploying Analog-Frontend Digital-Backend Circuits. IEEE Trans. Circuits Syst. II Express Briefs 71 (2) (2024)
Bo Liu, Xuanhao Zhang, Hui Kou, Chenjie Xia, Zhen Wang, Hao Cai
On-Chip-Registration Supported ASR Processor Using Two-Step Transfer-Learning TWN. IEEE Trans. Circuits Syst. II Express Briefs 71 (5) (2024)
Zeju Li, Qinfan Wang, Zihan Zou, Qiao Shen, Na Xie, Hao Cai, Hao Zhang, Bo Liu
Layer-Sensitive Neural Processing Architecture for Error-Tolerant Applications. IEEE Trans. Very Large Scale Integr. Syst. 32 (5) (2024)
Jia-Le Cui, Yanan Guo, Juntong Chen, Bo Liu, Hao Cai
Sparsity-Oriented MRAM-Centric Computing for Efficient Neural Network Inference. IEEE Trans. Emerg. Top. Comput. 12 (1) (2024)
An Guo, Xi Chen, Fangyuan Dong, Jinwu Chen, Zhihang Yuan, Xing Hu, Yuanpeng Zhang, Jingmin Zhang, Yuchen Tang, Zhican Zhang, Gang Chen, Dawei Yang, Zhaoyang Zhang, Lizheng Ren, Tianzhu Xiong, Bo Wang, Bo Liu, Weiwei Shan, Xinning Liu, Hao Cai, Guangyu Sun, Jun Yang, Xin Si
34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs. ISSCC (2024)
Zhong-Jian Bian, Bo Liu, Hao Cai
Computing in-memory with cascaded spintronic devices for AI edge. Comput. Electr. Eng. 109 (Part B) (2023)
Bo Liu, Hao Cai, Zilong Zhang, Xiaoling Ding, Renyuan Zhang, Yu Gong, Zhen Wang, Wei Ge, Jun Yang
Multiplication Circuit Architecture for Error- Tolerant CNN-Based Keywords Speech Recognition. IEEE Des. Test 40 (3) (2023)
Bo Liu, Anfeng Xue, Ziyu Wang, Na Xie, Xuetao Wang, Zhen Wang, Hao Cai
A Reconfigurable Approximate Computing Architecture With Dual-VDD for Low-Power Binarized Weight Network Deployment. IEEE Trans. Circuits Syst. II Express Briefs 70 (1) (2023)
Hao Cai, Zhong-Jian Bian, Yaoru Hou, Yongliang Zhou, Jia-le Cui, Yanan Guo, Xiaoyun Tian, Bo Liu, Xin Si, Zhen Wang, Jun Yang, Weiwei Shan
A 28nm 2Mb STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell and 22.4 - 41.5TOPS/W for AI Inference. ISSCC (2023)
Bo Liu, Renyuan Zhang, Qiao Shen, Zeju Li, Na Xie, Yuanhao Wang, Chonghang Xie, Hao Cai
W-AMA: Weight-aware Approximate Multiplication Architecture for neural processing. Comput. Electr. Eng. 111 (Part A) (2023)
Hao Cai, Yaoru Hou, Mengdi Zhang, Bo Liu, Lirida Alves de Barros Naviner
Dependable STT-MRAM With Emerging Approximation and Speculation Paradigms. IEEE Des. Test 40 (3) (2023)
Bo Liu, Hao Cai, Zilong Zhang, Xiaoling Ding, Ziyu Wang, Yu Gong, Weiqiang Liu, Jinjiang Yang, Zhen Wang, Jun Yang
More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (4) (2022)
Bo Liu, Xuetao Wang, Renyuan Zhang, Anfeng Xue, Ziyu Wang, Haige Wu, Hao Cai
A Low Power DNN-based Speech Recognition Processor with Precision Recoverable Approximate Computing. ISCAS (2022)
Bo Liu, Ziyu Wang, Xuetao Wang, Renyuan Zhang, Anfeng Xue, Qiao Shen, Na Xie, Yu Gong, Zhen Wang, Jun Yang, Hao Cai
An Efficient BCNN Deployment Method Using Quality-Aware Approximate Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Xuanhao Zhang, Haige Wu, Renyuan Zhang, Zihang Xu, Hao Zhang, Bo Liu, Hao Cai
A TWN Inspired Speaker Verification Processor with Hardware-friendly Weight Quantization. ICTA (2022)
Guoqiang He, Xiaoling Ding, Minghao Zhou, Bo Liu, Li Li
Background Noise Adaptive Energy-Efficient Keywords Recognition Processor With Reusable DNN and Reconfigurable Architecture. IEEE Access 10 (2022)
Hao Cai, Yanan Guo, Bo Liu, Mingyang Zhou, Juntong Chen, Xinning Liu, Jun Yang
Proposal of Analog In-Memory Computing With Magnified Tunnel Magnetoresistance Ratio and Universal STT-MRAM Cell. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (4) (2022)
Bo Liu, Mingyue Liu, Yongliang Zhou, Xiaofeng Hong, Hao Cai, Lirida Alves de Barros Naviner
Writing-only in-MRAM computing paradigm for ultra-low power applications. Microprocess. Microsystems 90 (2022)
Qiao Shen, Renyuan Zhang, Hao Zhang, Hao Cai, Bo Liu, Jian Xiao
A CGP-based Efficient Approximate Multiplier with Error Compensation. ICTA (2022)
Yu Gong, Hao Cai, Haige Wu, Wei Ge, Hao Yan, Zhen Wang, Longxing Shi, Bo Liu
Quality Driven Systematic Approximation for Binary-Weight Neural Network Deployment. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (7) (2022)
Bo Liu, Hao Cai, Xuan Zhang, Haige Wu, Anfeng Xue, Zilong Zhang, Zhen Wang, Jun Yang
A Target-Separable BWN Inspired Speech Recognition Processor with Low-power Precision-adaptive Approximate Computing. DATE (2022)
Juntong Chen, Hao Cai, Bo Liu, Jun Yang
Triple-Skipping Near-MRAM Computing Framework for AIoT Era. DATE (2022)
Bo Liu, Zilong Zhang, Hao Cai, Reyuan Zhang, Zhen Wang, Jun Yang
Self-compensation tensor multiplication unit for adaptive approximate computing in low-power CNN processing. Sci. China Inf. Sci. 65 (4) (2022)
Hao Cai, Bo Liu, Juntong Chen, Lirida A. B. Naviner, Yongliang Zhou, Zhen Wang, Jun Yang
A survey of in-spin transfer torque MRAM computing. Sci. China Inf. Sci. 64 (6) (2021)
Bo Liu, Zeyu Shen, Lepeng Huang, Yu Gong, Zilong Zhang, Hao Cai
A 1D-CRNN Inspired Reconfigurable Processor for Noise-robust Low-power Keywords Recognition. DATE (2021)
Yaoru Hou, We Ge, Yanan Guo, Lirida A. B. Naviner, You Wang, Bo Liu, Jun Yang, Hao Cai
Cryogenic In-MRAM Computing. NANOARCH (2021)
Zhong-Jian Bian, Yanan Guo, Bo Liu, Hao Cai
In-MRAM Computing Elements with Single-Step Convolution and Fully Connected for BNN/TNN. ICTA (2021)
Bo Liu, Hao Cai, Yu Gong, Wentao Zhu, Yan Li, Wei Ge, Zhen Wang
Binarized Weight Neural-Network Inspired Ultra-Low Power Speech Recognition Processor with Time-Domain Based Digital-Analog Mixed Approximate Computing. ISCAS (2020)
Ping Wang, Jinjiang Yang, Min Zhu, Bo Liu
A High-throughput Low-area Entropy Source Based on Asynchronous Feedback Unit. ICCSP (2020)
Bo Liu, Yan Li, Lepeng Huang, Hao Cai, Wentao Zhu, Shisheng Guo, Yu Gong, Zhen Wang
A Background Noise Self-adaptive VAD Using SNR Prediction Based Precision Dynamic Reconfigurable Approximate Computing. ACM Great Lakes Symposium on VLSI (2020)
Yongliang Zhou, Hao Cai, Lei Xie, Menglin Han, Mingyue Liu, Shi Xu, Bo Liu, Weisheng Zhao, Jun Yang
A Self-Timed Voltage-Mode Sensing Scheme With Successive Sensing and Checking for STT-MRAM. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. (5) (2020)
Hao Cai, Honglan Jiang, Yongliang Zhou, Menglin Han, Bo Liu
Interplay Bitwise Operation in Emerging MRAM for Efficient In-memory Computing. CCF Trans. High Perform. Comput. 2 (3) (2020)
Yongliang Zhou, Hao Cai, Bo Liu, Weisheng Zhao, Jun Yang
MTJ-LRB: Proposal of MTJ-Based Loop Replica Bitline as MRAM Device-Circuit Interaction for PVT-Robust Sensing. IEEE Trans. Circuits Syst. (12) (2020)
Wei Ge, Shenghua Chen, Benyu Liu, Min Zhu, Bo Liu
A Power Analysis Attack Countermeasure Based on Random Data Path Execution For CGRA. IEICE Trans. Inf. Syst. (5) (2020)
Yu Gong, Yan Li, Xiaoling Ding, Haichuan Yang, Zilong Zhang, Xuan Zhang, Wei Ge, Zhen Wang, Bo Liu
QCNN Inspired Reconfigurable Keyword Spotting Processor With Hybrid Data-Weight Reuse Methods. IEEE Access 8 (2020)
Bo Liu, Yuhao Sun, Hao Cai, Zeyu Shen, Yu Gong, Lepeng Huang, Zhen Wang
An Ultra-low Power Keyword-Spotting Accelerator Using Circuit-Architecture-System Co-design and Self-adaptive Approximate Computing Based BWN. ACM Great Lakes Symposium on VLSI (2020)
Wei Ge, Shenxin Hu, Ji Quan Huang, Bo Liu, Min Zhu
FPGA implementation of a challenge pre-processing structure arbiter PUF designed for machine learning attack resistance. IEICE Electron. Express 17 (2) (2020)
Bo Liu, Hao Cai, Zhen Wang, Yuhao Sun, Zeyu Shen, Wentao Zhu, Yan Li, Yu Gong, Wei Ge, Jun Yang, Longxing Shi
A 22nm, 10.8 μ W/15.1 μ W Dual Computing Modes High Power-Performance-Area Efficiency Domained Background Noise Aware Keyword- Spotting Processor. IEEE Trans. Circuits Syst. (12) (2020)
Bo Liu, Zhen Wang, Hu Fan, Jing Yang, Bo Liu, Wentao Zhu, Lepeng Huang, Yu Gong, Wei Ge, Longxing Shi
EERA-KWS: A 163 TOPS/W Always-on Keyword Spotting Accelerator in 28nm CMOS Using Binary Weight Network and Precision Self-Adaptive Approximate Computing. IEEE Access 7 (2019)
Yongliang Zhou, Menglin Han, Mingyue Liu, Hao Cai, Bo Liu, Jun Yang
A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield Improvement. NANOARCH (2019)
Yu Gong, Bo Liu, Wei Ge, Longxing Shi
ARA: Cross-Layer approximate computing framework based reconfigurable architecture for CNNs. Microelectron. J. 87 (2019)
Bo Liu, Zhen Wang, Wentao Zhu, Yuhao Sun, Zeyu Shen, Lepeng Huang, Yan Li, Yu Gong, Wei Ge
An Ultra-Low Power Always-On Keyword Spotting Accelerator Using Quantized Convolutional Neural Network and Voltage-Domain Analog Switching Network-Based Approximate Computing. IEEE Access 7 (2019)
Bo Liu, Zhen Wang, Shisheng Guo, Huazhen Yu, Yu Gong, Jun Yang, Longxing Shi
An energy-efficient voice activity detector using deep neural networks and approximate computing. Microelectron. J. 87 (2019)
Zhen Wang, Mengwen Xia, Bo Liu, Xing Ruan, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang
EERA-DNN: An energy-efficient reconfigurable architecture for DNNs with hybrid bit-width and logarithmic multiplier. IEICE Electron. Express 15 (8) (2018)
Wei Ge, Ji Quan Huang, Bo Liu, Min Zhu, Yuan Cao
A Deep Learning Modeling Attack Method for MISR-APUF Protection Structures. APCCAS (2018)
Bo Liu, Hai Qin, Yu Gong, Wei Ge, Mengwen Xia, Longxing Shi
EERA-ASR: An Energy-Efficient Reconfigurable Architecture for Automatic Speech Recognition With Hybrid DNN and Approximate Computing. IEEE Access 6 (2018)
Shan-shan Zhu, Hai Qin, Bo Liu, Jun Yang
Design and Optimization of Reconfigurable Data Path for Communication Baseband Signal Processing. CyberC (2018)
Shenghua Chen, Wei Ge, Jinjiang Yang, Bo Liu, Jun Yang
A Power Analysis Attack Countermeasure Based on Random Execution. TrustCom/BigDataSE (2018)
Bo Liu, Shisheng Guo, Hai Qin, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang
An Energy-efficient Reconfigurable Hybrid DNN Architecture for Speech Recognition with Approximate Computing. DSL (2018)
Zhen Wang, Yuan Zhuang, Jun Yang, Hengfeng Zhang, Wei Dong, Min Wang, Luchi Hua, Bo Liu, Longxing Shi
A Double Dwell High Sensitivity GPS Acquisition Scheme Using Binarized Convolution Neural Network. Sensors 18 (5) (2018)
Chao Wang, Peng Cao, Bo Liu, Jun Yang
Coarse-grained reconfigurable architecture with hierarchical context cache structure and management approach. IEICE Electron. Express 14 (6) (2017)
Peng Cao, Bo Liu, Jinjiang Yang, Jun Yang, Meng Zhang, Longxing Shi
Context Management Scheme Optimization of Coarse-Grained Reconfigurable Architecture for Multimedia Applications. IEEE Trans. Very Large Scale Integr. Syst. 25 (8) (2017)
Yu Gong, Tingting Xu, Bo Liu, Wei Ge, Jinjiang Yang, Jun Yang, Longxing Shi
Processing LSTM in memory using hybrid network expansion model. SiPS (2017)
Bo Liu, Wei Dong, Tingting Xu, Yu Gong, Wei Ge, Jinjiang Yang, Longxing Shi
E-ERA: An energy-efficient reconfigurable architecture for RNNs using dynamically adaptive approximate computing. IEICE Electron. Express 14 (15) (2017)
Zhen Wang, Hai Qin, Yu Gong, Bo Liu
Implementation and Verification of a High-Throughput Reconfigurable MIMO Detector. CyberC (2017)
Bo Liu, Xing Ruan, Mengwen Xia, Yu Gong, Jinjiang Yang, Wei Ge, Jun Yang
An energy-efficient accelerator for hybrid bit-width DNNs. SSCI (2017)
Jinjiang Yang, Dongming Zhang, Yu Gong, Bo Liu
A Novel Design of Pipeline MDC-FFT Processor Based on Various Memory Access Mechanism. CyberC (2016)
Bo Liu, Yu Gong, Rui-he Wang, Yang Liu
Performance-Conscious Reconfiguration Structure for Large-Scale Coarse-Grained Reconfigurable System. CyberC (2015)
Yu Gong, Bo Liu, Chen Mei, Rui-he Wang
A novel configuration context cache structure of reconfigurable systems. ASICON (2015)
Bo Liu, Dongming Zhang, Wei-qi Ge, Yu Gong
A novel routing structure of coarse-grained reconfigurable architecture for radar application. ASICON (2015)
Chen Mei, Peng Cao, Yang Zhang, Bo Liu, Leibo Liu
Hierarchical Pipeline Optimization of Coarse Grained Reconfigurable Processor for Multimedia Applications. IPDPS Workshops (2014)
Bo Liu, Wan-Yu Zhu, Yang Liu, Peng Cao
A Configuration Compression Approach for Coarse-Grain Reconfigurable Architecture for Radar Signal Processing. CyberC (2014)
Bo Liu, Peng Cao, Min Zhu, Jun Yang, Leibo Liu, Shaojun Wei, Longxing Shi
Reconfiguration Process Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications. IEICE Trans. Inf. Syst. (7) (2012)
Peng Cao, Huiyan Jiang, Bo Liu, Weiwei Shan
Memory Bandwidth Optimization Strategy of Coarse-Grained Reconfigurable Architecture. CyberC (2012)
Peng Cao, Yong Cai, Bo Liu, Weiwei Shan
Configuration Cache Management for Coarse-Grained Reconfigurable Architecture with Multi-Array. CyberC (2012)
Bo Liu, Peng Cao, Jinjiang Yang
Hybrid-Priority Configuration Cache Supervision Method for Coarse Grained Reconfigurable Architecture. CyberC (2012)