Yongliang Zhou

Publication Activity (10 Years)

Years Active: 2010-2024
Publications (10 Years): 27

Top Topics

Random Access Memory

Sparse Matrices

Computing Paradigms

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Shan Shen, Hao Xu, Yongliang Zhou, Ming Ling, Wenjian Yu
Ultra8T: A sub-threshold 8T SRAM with leakage detection. Integr. 98 (2024)
Licai Hao, Xinyi Zhang, Chenghu Dai, Qiang Zhao, Wenjuan Lu, Chunyu Peng, Yongliang Zhou, Zhiting Lin, Xiulong Wu
Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch Based on Polarity Design and Source-Isolation Technologies. IEEE Trans. Very Large Scale Integr. Syst. 32 (4) (2024)
Yongliang Zhou, Zhen Yang, Yiming Wei, Xiao Lin, Saiai Wu, Wenjuan Lu, Chunyu Peng, Xin Li, Xiulong Wu
A Timing-Shared Adaptive Sensing Methodology for Low-Voltage SRAM. ISCAS (2024)
Yongliang Zhou, Yiming Wei, Tianzhu Xiong, Zixuan Zhou, Zhen Yang, Xiao Lin, Wei Hu, Xiulong Wu, Chunyu Peng
An 8b-Precison 16-Kb FDSOI 8T SRAM CIM macro based on time-domain for energy-efficient edge AI devices. Microelectron. J. 151 (2024)
Yongliang Zhou, Zixuan Zhou, Yiming Wei, Zhen Yang, Xiao Lin, Chenghu Dai, Licai Hao, Chunyu Peng, Hao Cai, Xiulong Wu
A CFMB STT-MRAM-Based Computing-in-Memory Proposal With Cascade Computing Unit for Edge AI Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (1) (2024)
Licai Hao, Yaling Wang, Yunlong Liu, Shiyu Zhao, Xinyi Zhang, Yang Li, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Yongliang Zhou, Chenghu Dai, Zhiting Lin, Xiulong Wu
Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design. IEEE Trans. Very Large Scale Integr. Syst. 32 (5) (2024)
Yue Zhao, Yunlong Liu, Jian Zheng, Zhongzhen Tong, Xin Wang, Runru Yu, Xiulong Wu, Yongliang Zhou, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin
Configurable in-memory computing architecture based on dual-port SRAM. Microelectron. J. 147 (2024)
An Guo, Xin Si, Xi Chen, Fangyuan Dong, Xingyu Pu, Dongqi Li, Yongliang Zhou, Lizheng Ren, Yeyang Xue, Xueshan Dong, Hui Gao, Yiran Zhang, Jingmin Zhang, Yuyao Kong, Tianzhu Xiong, Bo Wang, Hao Cai, Weiwei Shan, Jun Yang
A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs. ISSCC (2023)
Shan Shen, Hao Xu, Yongliang Zhou, Wenjian Yu
A Single-Ended Offset-Canceling Sense Amplifier Enabling Wide-Voltage Operations. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Shan Shen, Hao Xu, Yongliang Zhou, Ming Ling, Wenjian Yu
Ultra8T: A Sub-Threshold 8T SRAM with Leakage Detection. CoRR (2023)
Bo Wang, Chen Xue, Zhongyuan Feng, Zhaoyang Zhang, Han Liu, Lizheng Ren, Xiang Li, Anran Yin, Tianzhu Xiong, Yeyang Xue, Shengnan He, Yuyao Kong, Yongliang Zhou, An Guo, Xin Si, Jun Yang
A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-Networks. ISSCC (2023)
Hao Cai, Zhong-Jian Bian, Yaoru Hou, Yongliang Zhou, Jia-le Cui, Yanan Guo, Xiaoyun Tian, Bo Liu, Xin Si, Zhen Wang, Jun Yang, Weiwei Shan
A 28nm 2Mb STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell and 22.4 - 41.5TOPS/W for AI Inference. ISSCC (2023)
Bo Wang, Chen Xue, Han Liu, Xiang Li, Anran Yin, Zhongyuan Feng, Yuyao Kong, Tianzhu Xiong, Haiming Hsu, Yongliang Zhou, An Guo, Yufei Wang, Jun Yang, Xin Si
SNNIM: A 10T-SRAM based Spiking-Neural-Network-In-Memory architecture with capacitance computation. ISCAS (2022)
An Guo, Yongliang Zhou, Bo Wang, Tianzhu Xiong, Chen Xue, Yufei Wang, Xin Si, Jun Yang
ShareFloat CIM: A Compute-In-Memory Architecture with Floating-Point Multiply-and-Accumulate Operations. ISCAS (2022)
Bo Liu, Mingyue Liu, Yongliang Zhou, Xiaofeng Hong, Hao Cai, Lirida Alves de Barros Naviner
Writing-only in-MRAM computing paradigm for ultra-low power applications. Microprocess. Microsystems 90 (2022)
Yongliang Zhou, Zuo Cheng, Han Liu, Tianzhu Xiong, Bo Wang
A 22-nm FDSOI 8T SRAM Based Time-Domain CIM for Energy-Efficient DNN Accelerators. APCCAS (2022)
Hao Cai, Bo Liu, Juntong Chen, Lirida A. B. Naviner, Yongliang Zhou, Zhen Wang, Jun Yang
A survey of in-spin transfer torque MRAM computing. Sci. China Inf. Sci. 64 (6) (2021)
Yufei Wang, Yongliang Zhou, Bo Wang, Tianzhu Xiong, Yuyao Kong, Xin Si
Design Challenges and Methodology of High-Performance SRAM-Based Compute-in-Memory for AI Edge Devices. UCET (2021)
Tianzhu Xiong, Yongliang Zhou, Yuyao Kong, Bo Wang, An Guo, Yufei Wang, Chen Xue, Haiming Hsu, Xin Si, Jun Yang
Design Methodology towards High-Precision SRAM based Computation-in-Memory for AI Edge Devices. ISOCC (2021)
Xin Si, Yongliang Zhou, Jun Yang, Meng-Fan Chang
Challenge and Trend of SRAM Based Computation-in-Memory Circuits for AI Edge Devices. ASICON (2021)
Hao Cai, Juntong Chen, Yongliang Zhou, Weisheng Zhao
Toward Energy-Efficient STT-MRAM Design With Multi-Modes Reconfiguration. IEEE Trans. Circuits Syst. II Express Briefs 68 (7) (2021)
Yongliang Zhou, Hao Cai, Lei Xie, Menglin Han, Mingyue Liu, Shi Xu, Bo Liu, Weisheng Zhao, Jun Yang
A Self-Timed Voltage-Mode Sensing Scheme With Successive Sensing and Checking for STT-MRAM. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. (5) (2020)
Hao Cai, Honglan Jiang, Yongliang Zhou, Menglin Han, Bo Liu
Interplay Bitwise Operation in Emerging MRAM for Efficient In-memory Computing. CCF Trans. High Perform. Comput. 2 (3) (2020)
Yongliang Zhou, Hao Cai, Bo Liu, Weisheng Zhao, Jun Yang
MTJ-LRB: Proposal of MTJ-Based Loop Replica Bitline as MRAM Device-Circuit Interaction for PVT-Robust Sensing. IEEE Trans. Circuits Syst. (12) (2020)
Nilson Maciel, Elaine Crespo Marques, Lirida A. B. Naviner, Yongliang Zhou, Hao Cai
Magnetic Tunnel Junction Applications. Sensors 20 (1) (2020)
Yongliang Zhou, Menglin Han, Mingyue Liu, Hao Cai, Bo Liu, Jun Yang
A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield Improvement. NANOARCH (2019)
Zhengping Li, Mingming Xie, Xincun Ji, Yongliang Zhou
Robust activating timing for SRAM SA with replica cell voltage boosted circuit. IEICE Electron. Express 13 (10) (2016)
Hongwei Liu, Yongliang Zhou
Rank-two residue iteration method for nonnegative matrix factorization. Neurocomputing 74 (17) (2011)
Na Wei, Yongliang Zhou
Analysis of how to use the GEB developing. ICEE (2010)