Lirida A. B. Naviner

ORCID

Publication Activity (10 Years)

Years Active: 1999-2024
Publications (10 Years): 39

Top Venues

Microelectron. Reliab.

NANOARCH

ISVLSI

LASCAS

Publications

Esther Goudet, Fabio Sureau, Paul Breuil, Luis Peña Treviño, Lirida A. B. Naviner, Jean-Marc Daveau, Philippe Roche
Analysis of Combinational Circuit Failure Rate based on Graph Partitioning and Probabilistic Binomial Approach. J. Electron. Test. 40 (3) (2024)
Esther Goudet, Luis Peña Treviño, Lirida A. B. Naviner, Jean-Marc Daveau, Philippe Roche
Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioning. LATS (2023)
Xuecan Yang, Sumanta Chaudhuri, Laurence Likforman, Lirida A. B. Naviner
Minconvnets: a New Class of Multiplication-Less Neural Networks. ICIP (2022)
David C. C. Freitas, Jarbas Silveira, César A. M. Marcon, Lirida A. B. Naviner, João Cesar M. Mota
OPCoSA: an Optimized Product Code for space applications. Integr. 84 (2022)
Hao Cai, Bo Liu, Juntong Chen, Lirida A. B. Naviner, Yongliang Zhou, Zhen Wang, Jun Yang
A survey of in-spin transfer torque MRAM computing. Sci. China Inf. Sci. 64 (6) (2021)
Xuecan Yang, Sumanta Chaudhuri, Laurence Likforman, Lirida A. B. Naviner
MinConvNets: A new class of multiplication-less Neural Networks. CoRR (2021)
Yu-ang Wu, Lirida A. B. Naviner, Hao Cai
Hybrid MTJ-CMOS Integration for Sigma-Delta ADC. NANOARCH (2021)
Yaoru Hou, We Ge, Yanan Guo, Lirida A. B. Naviner, You Wang, Bo Liu, Jun Yang, Hao Cai
Cryogenic In-MRAM Computing. NANOARCH (2021)
You-You Zhang, Lirida A. B. Naviner, Hao Cai
Ultra-low Power Access Strategy for Process-Voltage-Temperature Aware STT-MRAM. ASICON (2021)
Nilson Maciel, Elaine Crespo Marques, Lirida A. B. Naviner, Yongliang Zhou, Hao Cai
Magnetic Tunnel Junction Applications. Sensors 20 (1) (2020)
Xuecan Yang, Sumanta Chaudhuri, Lirida A. B. Naviner, Laurence Likforman
Quad-Approx CNNs for Embedded Object Detection Systems. ICECS (2020)
Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
Deep Learning Approaches for Sparse Recovery in Compressive Sensing. ISPA (2019)
Mingyue Liu, Hao Cai, Menglin Han, Lei Xie, Jun Yang, Lirida A. B. Naviner
Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM. NANOARCH (2019)
Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
Nonlinear Functions in Learned Iterative Shrinkage-Thresholding Algorithm for Sparse Signal Recovery. SiPS (2019)
Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
A Review of Sparse Recovery Algorithms. IEEE Access 7 (2019)
Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
Optimal asymmetrical back plane biasing for energy efficient digital circuits in 28 nm UTBB FD-SOI. Integr. 65 (2019)
Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao
MRAM-on-FDSOI Integration: A Bit-Cell Perspective. ISVLSI (2018)
Fábio B. Armelin, Lirida A. B. Naviner, Roberto d'Amore
Probability aware fault-injection approach for SER estimation. LATS (2018)
Rafael B. Schvittz, Matheus F. Pontes, Cristina Meinhardt, Denis Teixeira Franco, Lirida A. B. Naviner, Leomar S. da Rosa, Paulo F. Butzen
Reliability evaluation of circuits designed in multi- and single-stage versions. LASCAS (2018)
Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Weiwei Shan, Jun Yang, Weisheng Zhao
Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques. ISCAS (2018)
Tian Ban, Baokun Wang, Lirida A. B. Naviner
Design, Synthesis and Application of A Novel Approximate Adder. MWSCAS (2018)
Nilson Maciel, Elaine Crespo Marques, Lirida A. B. Naviner, Hao Cai
Single-event transient effects on dynamic comparator in 28 nm FDSOI CMOS technology. Microelectron. Reliab. (2018)
You Wang, Yue Zhang, Youguang Zhang, Weisheng Zhao, Hao Cai, Lirida A. B. Naviner
Design Space Exploration of Magnetic Tunnel Junction based Stochastic Computing in Deep Learning. ACM Great Lakes Symposium on VLSI (2018)
Menglin Han, Hao Cai, Jun Yang, Lirida A. B. Naviner, You Wang, Weisheng Zhao
Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement. APCCAS (2018)
Hao Cai, Menglin Han, You Wang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao
Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power. DCIS (2018)
Elaine Crespo Marques, Nilson Maciel, Lirida A. B. Naviner, Hao Cai, Jun Yang
Compressed Sensing for Wideband HF Channel Estimation. ICFSP (2018)
Francisco Veirano, Fernando Silveira, Lirida A. B. Naviner
Asymmetrical length biasing for energy efficient digital circuits. LASCAS (2017)
Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2017)
Hao Cai, You Wang, Lirida A. B. Naviner, Wang Kang, Weisheng Zhao
Energy Efficient Magnetic Tunnel Junction Based Hybrid LSI Using Multi-Threshold UTBB-FD-SOI Device. ACM Great Lakes Symposium on VLSI (2017)
Mariem Slimani, K. Benkalaia, Lirida A. B. Naviner
Analysis of ageing effects on ARTIX7 XILINX FPGA. Microelectron. Reliab. (2017)
Hao Cai, You Wang, Lirida A. B. Naviner, Weisheng Zhao
Novel Pulsed-Latch Replacement in Non-Volatile Flip-Flop Core. ISVLSI (2017)
You Wang, Hao Cai, Lirida A. B. Naviner, Jacques-Olivier Klein, Jianlei Yang, Weisheng Zhao
A novel circuit design of true random number generator using magnetic tunnel junction. NANOARCH (2016)
Mariem Slimani, Paulo F. Butzen, Lirida A. B. Naviner, Y. Wang, Hao Cai
Reliability analysis of hybrid spin transfer torque magnetic tunnel junction/CMOS majority voters. Microelectron. Reliab. 64 (2016)
Francisco Veirano, Fernando Silveira, Lirida A. B. Naviner
Minimum Operating Voltage Due to Intrinsic Noise in Subthreshold Digital Logic in Nanoscale CMOS. J. Low Power Electron. 12 (1) (2016)
Y. Wang, Hao Cai, Lirida A. B. Naviner, X. X. Zhao, Yue Zhang, Mariem Slimani, Jacques-Olivier Klein, Weisheng Zhao
A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. Microelectron. Reliab. 64 (2016)
Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
Pushing minimum energy limits by optimal asymmetrical back plane biasing in 28 nm UTBB FD-SOI. PATMOS (2016)
Rafael B. Schivittz, Rafael Fritz, Denis Teixeira Franco, Lirida A. B. Naviner, Cristina Meinhardt, Paulo F. Butzen
Inserting permanent fault input dependence on PTM to improve robustness evaluation. SBCCI (2016)
Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Bosko Nikolic, Lirida A. B. Naviner
Design considerations for reliable OxRAM-based non-volatile flip-flops in 28nm FD-SOI technology. ISCAS (2016)
Hao Cai, You Wang, Lirida A. B. Naviner, Zhaohao Wang, Weisheng Zhao
Approximate computing in MOS/spintronic non-volatile full-adder. NANOARCH (2016)
Xavier Pons Masbernat, Christophe Gruet, Eric Georgeaux, Lirida A. B. Naviner
D2D broadcast communications for 4G PMR networks. NTMS (2015)
Mariem Slimani, Lirida A. B. Naviner
A tool for transient fault analysis in combinational circuits. ICECS (2015)
Y. Wang, Hao Cai, Lirida A. B. Naviner, Yue Zhang, Jacques-Olivier Klein, Weisheng Zhao
Compact thermal modeling of spin transfer torque magnetic tunnel junction. Microelectron. Reliab. 55 (9-10) (2015)
Arwa Ben Dhia, Mariem Slimani, Hao Cai, Lirida A. B. Naviner
A dual-rail compact defect-tolerant multiplexer. Microelectron. Reliab. 55 (3-4) (2015)
Mariem Slimani, Arwa Ben Dhia, Lirida A. B. Naviner
A novel analytical method for defect tolerance assessment. Microelectron. Reliab. 55 (9-10) (2015)
Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Gilles Gasiot, Fady Abouzeid, Sylvain Clerc, Lirida A. B. Naviner, Philippe Roche
Frequency and voltage effects on SER on a 65nm Sparc-V8 microprocessor under radiation test. IRPS (2015)
Ting An, Kaikai Liu, Hao Cai, Lirida A. B. Naviner
Accurate reliability analysis of concurrent checking circuits employing an efficient analytical method. Microelectron. Reliab. 55 (3-4) (2015)
Cyril Bottoni, Benjamin Coeffic, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
Partial triplication of a SPARC-V8 microprocessor using fault injection. LASCAS (2015)
Hao Cai, You Wang, Lirida A. B. Naviner, W. S. Zhao
Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28 nm FDSOI technology. Microelectron. Reliab. 55 (9-10) (2015)
Xavier Pons, Christophe Gruet, Eric Georgeaux, Lirida A. B. Naviner
An energy efficient D2D LTE structure for PMR based on FlashLinQ. ISWCS (2015)
Xavier Pons Masbernat, Saud Althunibat, Godfrey Kibalya, Christophe Gruet, Lirida A. B. Naviner, Fabrizio Granelli
Battery-aware network discovery algorithm for mobile terminals within heterogeneous networks. CAMAD (2014)
Lirida A. B. Naviner, Kaikai Liu, Hao Cai, Jean-François Naviner
Efficient computation of combinational circuits reliability based on probabilistic transfer matrix. ICICDT (2014)
Mariem Slimani, Arwa Ben Dhia, Lirida A. B. Naviner
Cross logic: A new approach for defect-tolerant circuits. ICICDT (2014)
Xavier Pons Masbernat, Agapi Mesodiakaki, Christophe Gruet, Lirida A. B. Naviner, Ferran Adelantado, Luis Alonso, Christos V. Verikoukis
An energy efficient vertical handover decision algorithm. GLOBECOM Workshops (2014)
You Wang, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Lirida A. B. Naviner, Weisheng Zhao
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. Microelectron. Reliab. 54 (9-10) (2014)
Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Jean-Michel Portal, Bosko Nikolic, Lirida A. B. Naviner
OxRAM-based non volatile flip-flop in 28nm FDSOI. NEWCAS (2014)
Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner
Improving the robustness of a switch box in a mesh of clusters FPGA. LATW (2014)
Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner
A defect-tolerant multiplexer using differential logic for FPGAs. MIXDES (2014)
Saif-Ur Rehman, Adrien Blanchardon, Arwa Ben Dhia, Mounir Benabdenbi, Roselyne Chotin-Avot, Lirida A. B. Naviner, Lorena Anghel, Habib Mehrez, Emna Amouri, Zied Marrakchi
Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA. ISVLSI (2014)
Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner, Dhiraj K. Pradhan
A hybrid reliability assessment method and its support of sequential logic modelling. IOLTS (2014)
Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner
Comparative study of defect-tolerant multiplexers for FPGAs. IOLTS (2014)
Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat
Evaluating CLB designs under multiple SETs in SRAM-based FPGAs. DFTS (2013)
Xavier Pons Masbernat, Raúl Palacios, Christophe Gruet, Lirida A. B. Naviner, Hugo Marques, Fabrizio Granelli, Jonathan Rodriguez
Uplink energy efficiency in LTE systems. CAMAD (2013)
Arwa Ben Dhia, Saif-Ur Rehman, Adrien Blanchardon, Lirida A. B. Naviner, Mounir Benabdenbi, Roselyne Chotin-Avot, Emna Amouri, Habib Mehrez, Zied Marrakchi
A defect-tolerant cluster in a mesh SRAM-based FPGA. FPT (2013)
Tian Ban, Jianxin Wang, Ting An, Lirida A. B. Naviner
Modeling of transient faults and fault-tolerant design in nanoelectronics. MWSCAS (2013)
Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat
Comparison of fault-tolerant fabless CLBs in SRAM-based FPGAs. LATW (2013)
Kaikai Liu, Ting An, Hao Cai, Lirida A. B. Naviner, Jean-François Naviner, Hervé Petit
A general cost-effective design structure for probabilistic-based noise-tolerant logic functions in nanometer CMOS technology. EUROCON (2013)
Kaikai Liu, Hao Cai, Ting An, Lirida A. B. Naviner, Jean-François Naviner, Hervé Petit
Reliability analysis of combinational circuits with the influences of noise and single-event transients. DFTS (2013)
Samuel N. Pagliarini, Tian Ban, Lirida A. B. Naviner, Jean-François Naviner
Reliability assessment of combinational logic using first-order-only fanout reconvergence analysis. MWSCAS (2013)
Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner
Selective hardening against multiple faults employing a net-based reliability analysis. NEWCAS (2013)
Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner
Single event transient mitigation through pulse quenching: Effectiveness at circuit level. ICECS (2013)
Xavier Pons Masbernat, Christophe Gruet, Frédéric Fraysse, Serge Contal, Lirida A. B. Naviner
Green solutions for future LTE PMR networks. CAMAD (2012)
Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat
Analyzing and alleviating the impact of errors on an SRAM-based FPGA cluster. IOLTS (2012)
Kaikai Liu, Tian Ban, Lirida A. B. Naviner, Jean-François Naviner
Reliability analysis of a Reed-Solomon decoder. MWSCAS (2012)
Samuel Nascimento Pagliarini, Lirida A. B. Naviner, Jean-François Naviner
Selective hardening methodology for combinational logic. LATW (2012)
Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities. IOLTS (2011)
Tian Ban, Lirida A. B. Naviner
Progressive module redundancy for fault-tolerant designs in nanoelectronics. Microelectron. Reliab. 51 (9-11) (2011)
Lirida A. B. Naviner, Jean-François Naviner, G. G. dos Santos Jr., Elaine Crespo Marques, Nilson M. Paiva Jr.
FIFA: A fault-injection-fault-analysis-based tool for reliability assessment at RTL level. Microelectron. Reliab. 51 (9-11) (2011)
G. G. dos Santos, Elaine Crespo Marques, Lirida A. B. Naviner, Jean-François Naviner
Using error tolerance of target application for efficient reliability improvement of digital circuits. Microelectron. Reliab. 50 (9-11) (2010)
Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
Fast reliability analysis of combinatorial logic circuits using conditional probabilities. Microelectron. Reliab. 50 (9-11) (2010)
Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche
Handling reconvergent paths using conditional probabilities in combinatorial logic netlist reliability estimation. ICECS (2010)
Hicham Ezzat, Lirida A. B. Naviner
Level matrix propagation for reliability analysis of nano-scale circuits based on probabilistic transfer matrix. ISQED (2010)
Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner
On evaluating the signal reliability of self-checking arithmetic circuits. SBCCI (2010)
Elaine Crespo Marques, Lirida A. B. Naviner, Jean-François Naviner
An efficient tool for reliability improvement based on TMR. Microelectron. Reliab. 50 (9-11) (2010)
Ali Beydoun, Van Tam Nguyen, Lirida A. B. Naviner, Patrick Loumeau
A 65 nm CMOS Digital Processor for Multi-mode Time Interleaved High-pass SigmaDelta A/D Converters. ISCAS (2009)
Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner
Signal probability for reliability evaluation of logic circuits. Microelectron. Reliab. 48 (8-9) (2008)
Maí Correia R. de Vasconcelos, Denis Teixeira Franco, Lirida A. B. Naviner, Jean-François Naviner
On the output events in concurrent error detection schemes. ICECS (2008)
Maí Correia R. de Vasconcelos, Denis Teixeira Franco, Lirida A. B. Naviner, Jean-François Naviner
Relevant metrics for evaluation of concurrent error detection schemes. Microelectron. Reliab. 48 (8-9) (2008)
Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner
Reliability analysis of logic circuits based on signal probability. ICECS (2008)
Denis Teixeira Franco, Jean-François Naviner, Lirida A. B. Naviner
Yield and reliability issues in nanoelectronic technologies. Ann. des Télécommunications 61 (11-12) (2006)
Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
An iterative reconfigurability approach for WCDMA high-data-rate communications. IEEE Wirel. Commun. 13 (3) (2006)
Khaled Grati, Adel Ghazel, Lirida A. B. Naviner
Design and hardware implementation of digital channel selection decimating filter for multistandard receiver. ICECS (2005)
Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
Reconfigurable Implementation Issues of a Detection Scheme for DS-CDMA High Data Rate Connections. PIMRC (2005)
Daniel C. de Souza, Ioannis Krikidis, Lirida A. B. Naviner, Jean-Luc Danger, M. A. de Barros, B. G. A. Neto
Heterogeneous implementation of a rake receiver for DS-CDMA communication systems. ICECS (2005)
Ioannis Krikidis, Jean-Luc Danger, Lirida A. B. Naviner
A finger configuration algorithm for a reconfigurable Rake receiver. WCNC (2004)
Zouhair M. Belkoura, Lirida A. B. Naviner
Hardware implementation issues of a BMS decoding approach for AG based codes. WCNC (2003)
Patrick Loumeau, Jean-François Naviner, Hervé Petit, Lirida A. B. Naviner, Patricia Desgreys
Analog to digital conversion: technical aspects. Ann. des Télécommunications 57 (5-6) (2002)
Adel Ghazel, Lirida A. B. Naviner, Khaled Grati
On design and implementation of a decimation filter for multistandard wireless transceivers. IEEE Trans. Wirel. Commun. 1 (4) (2002)
Khaled Grati, Adel Ghazel, Lirida A. B. Naviner
Relaxed decimation filter specifications for wireless transceivers. ICECS (2002)
Elizabeth Colin, Patrick Loumeau, Lirida A. B. Naviner, Jean-François Naviner
Antialiasing filtering influences on ADC specifications for radio receivers. ICECS (2001)
Elizabeth Colin, Lirida A. B. Naviner, Patrick Loumeau, Jean-François Naviner
Trade-off between antialiasing filter and analog-to-digital converters specifications in homodyne radio frequency receivers. VTC Fall (2001)

Lirida A. B. Naviner

Publication Activity (10 Years)

Top Topics

Top Venues