Jean-Michel Portal

ORCID

Publication Activity (10 Years)

Years Active: 1997-2024
Publications (10 Years): 64

Top Venues

Publications

Clement Türck, Kamel-Eddine Harabi, Adrien Pontlevy, Théo Ballet, Tifenn Hirtzlin, Elisa Vianello, Raphaël Laurent, Jacques Droulez, Pierre Bessière, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
The Logarithmic Memristor-Based Bayesian Machine. CoRR (2024)
Nikhil Garg, Davide Florini, Patrick Dufour, Eloi Muhr, Mathieu-Coumba Faye, Marc Bocquet, Damien Querlioz, Yann Beilliard, Dominique Drouin, Fabien Alibart, Jean-Michel Portal
Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits. CoRR (2024)
Clement Türck, Kamel-Eddine Harabi, Tifenn Hirtzlin, Elisa Vianello, Raphaël Laurent, Jacques Droulez, Pierre Bessière, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
Energy-Efficient Bayesian Inference Using Near-Memory Computation with Memristors. DATE (2023)
Joel Minguet Lopez, Manon Dampfhoffer, Tifenn Hirtzlin, Lucas Reganaz, Laurent Grenouillet, Gabriele Navarro, Mathieu Bernard, Thomas Magis, Catherine Carabasse, Niccolo Castellani, Valentina Meli, Elisa Vianello, Damien Deleruyelle, Jean-Michel Portal, Gabriel Molas, François Andrieu
1S1R Sub-Threshold Operation in Crossbar Arrays for Neural Networks Hardware Implementation. MIXDES (2023)
Fadi Jebali, Atreya Majumdar, Clement Türck, Kamel-Eddine Harabi, Mathieu-Coumba Faye, Eloi Muhr, Jean-Pierre Walder, Oleksandr Bilousov, Amadeo Michaud, Elisa Vianello, Tifenn Hirtzlin, François Andrieu, Marc Bocquet, Stéphane Collin, Damien Querlioz, Jean-Michel Portal
Powering AI at the Edge: A Robust, Memristor-based Binarized Neural Network with Near-Memory Computing and Miniaturized Solar Cell. CoRR (2023)
Kamel-Eddine Harabi, Clement Türck, Marie Drouhin, Adrien Renaudineau, Thomas Bersani-Veroni, Damien Querlioz, Tifenn Hirtzlin, Elisa Vianello, Marc Bocquet, Jean-Michel Portal
A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects. CoRR (2023)
Mona Ezzadeen, Atreya Majumdar, Sigrid Thomas, Jean-Philippe Noël, Bastien Giraud, Marc Bocquet, François Andrieu, Damien Querlioz, Jean-Michel Portal
Binary ReRAM-based BNN first-layer implementation. DATE (2023)
Kamel-Eddine Harabi, Clement Türck, Marie Drouhin, A. Renaudineau, T. Bersani-Veroni, Damien Querlioz, Tifenn Hirtzlin, Elisa Vianello, Marc Bocquet, Jean-Michel Portal
A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects. ASP-DAC (2023)
Joel Minguet Lopez, François Rummens, L. Reganaz, A. Heraud, Tifenn Hirtzlin, Laurent Grenouillet, Gabriele Navarro, Mathieu Bernard, Catherine Carabasse, Niccolo Castellani, V. Meli, S. Martin, T. Magis, Elisa Vianello, C. Sabbione, Damien Deleruyelle, Marc Bocquet, Jean-Michel Portal, Gabriel Molas, François Andrieu
1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing. IMW (2022)
Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, S. Martin, Bastien Giraud, François Andrieu, Jean-Francois Nodin, Damien Querlioz, Jean-Michel Portal, Elisa Vianello
Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations. CoRR (2022)
Eduardo Esmanhotto, Tifenn Hirtzlin, Niccolo Castellani, S. Martin, Bastien Giraud, François Andrieu, Jean-François Nodin, Damien Querlioz, Jean-Michel Portal, Elisa Vianello
Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations. IRPS (2022)
Nikhil Garg, Ismael Balafrej, Terrence C. Stewart, Jean-Michel Portal, Marc Bocquet, Damien Querlioz, Dominique Drouin, Jean Rouat, Yann Beilliard, Fabien Alibart
Voltage-Dependent Synaptic Plasticity (VDSP): Unsupervised probabilistic Hebbian plasticity rule based on neurons membrane potential. CoRR (2022)
Eduardo Esmanhotto, Tifenn Hirtzlin, Djohan Bonnet, Niccolo Castellani, Jean-Michel Portal, Damien Querlioz, Elisa Vianello
Experimental Demonstration of Multilevel Resistive Random Access Memory Programming for up to Two Months Stable Neural Networks Inference Accuracy. Adv. Intell. Syst. 4 (11) (2022)
Eduardo Esmanhotto, Tifenn Hirtzlin, Djohan Bonnet, Niccolo Castellani, Jean-Michel Portal, Damien Querlioz, Elisa Vianello
Experimental Demonstration of Multilevel Resistive Random Access Memory Programming for up to Two Months Stable Neural Networks Inference Accuracy. Adv. Intell. Syst. 4 (11) (2022)
Atreya Majumdar, Marc Bocquet, Tifenn Hirtzlin, Axel Laborieux, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks. CoRR (2021)
M. Ezzadeen, Atreya Majumdar, Marc Bocquet, Bastien Giraud, Jean-Philippe Noël, François Andrieu, Damien Querlioz, Jean-Michel Portal
Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM Bridges. ESSCIRC (2021)
Joel Minguet Lopez, Lucas Hudeley, Laurent Grenouillet, Diego Alfaro Robayo, Jury Sandrini, Gabriele Navarro, Mathieu Bernard, Catherine Carabasse, Damien Deleruyelle, Niccolo Castellani, Marc Bocquet, Jean-Michel Portal, Etienne Nowak, Gabriel Molas
Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization. IRPS (2021)
F. Jebali, Atreya Majumdar, Axel Laborieux, Tifenn Hirtzlin, Elisa Vianello, J. P. Walder, Marc Bocquet, Damien Querlioz, Jean-Michel Portal
CAPC: A Configurable Analog Pop-Count Circuit for Near-Memory Binary Neural Networks. MWSCAS (2021)
J. Gasquez, Bastien Giraud, P. Boivin, Y. Moustapha-Rabault, Vincenzo Della Marca, J. P. Walder, Jean-Michel Portal
A Self-referenced and regulated sensing solution for PCM with OTS selector. VLSI-SoC (2021)
Valentin Egloff, Jean-Philippe Noel, Maha Kooli, Bastien Giraud, Lorenzo Ciampolini, Roman Gauchi, César Fuguet Tortolero, Eric Guthmuller, Mathieu Moreau, Jean-Michel Portal
Storage Class Memory with Computing Row Buffer: A Design Space Exploration. DATE (2021)
Kamel-Eddine Harabi, Tifenn Hirtzlin, Clement Türck, Elisa Vianello, Raphaël Laurent, Jacques Droulez, Pierre Bessière, Jean-Michel Portal, Marc Bocquet, Damien Querlioz
A Memristor-Based Bayesian Machine. CoRR (2021)
Joel Minguet Lopez, Niccolo Castellani, Laurent Grenouillet, L. Reganaz, Gabriele Navarro, Mathieu Bernard, Catherine Carabasse, T. Magis, Damien Deleruyelle, Marc Bocquet, Jean-Michel Portal, E. Nowak, Gabriel Molas
Ge-Se-Sb-N-based OTS scaling perspectives for high-density 1 S1R crossbar arrays. IMW (2021)
M. Ezzadeen, Atreya Majumdar, Marc Bocquet, Bastien Giraud, Jean-Philippe Noël, François Andrieu, Damien Querlioz, Jean-Michel Portal
Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM Bridges. ESSDERC (2021)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (1) (2021)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Liza Herrera Diez, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. AICAS (2020)
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Embracing the Unreliability of Memory Devices for Neuromorphic Computing. CoRR (2020)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Implementation of Ternary Weights with Resistive RAM Using a Single Sense Operation per Synapse. CoRR (2020)
Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. DATE (2020)
Jean-Philippe Noël, Valentin Egloff, Maha Kooli, Roman Gauchi, Jean-Michel Portal, H.-P. Charles, Pascal Vivet, Bastien Giraud
Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. DATE (2020)
M. Ezzadeen, D. Bosch, Bastien Giraud, S. Barraud, Jean-Philippe Noël, Didier Lattard, Joris Lacord, Jean-Michel Portal, François Andrieu
Ultra-High-density 3D vertical RRAM with stacked JunctionLess nanowires for In-Memory-Computing applications. CoRR (2020)
Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. CoRR (2020)
Alexandre Levisse, Marc Bocquet, Marco Rios, Mouhamad Alayan, Mathieu Moreau, Etienne Nowak, Gabriel Molas, Elisa Vianello, David Atienza, Jean-Michel Portal
Write Termination Circuits for RRAM: A Holistic Approach From Technology to Application Considerations. IEEE Access 8 (2020)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Liza Herrera Diez, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. CoRR (2020)
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Embracing the Unreliability of Memory Devices for Neuromorphic Computing. IRPS (2020)
Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. AICAS (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Marc Bocquet, Jacques-Olivier Klein, Jean-Michel Portal, Damien Querlioz
Stochastic Computing for Hardware Implementation of Binarized Neural Networks. IEEE Access 7 (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Marc Bocquet, Jacques-Olivier Klein, Jean-Michel Portal, Damien Querlioz
Stochastic Computing for Hardware Implementation of Binarized Neural Networks. CoRR (2019)
Tifenn Hirtzlin, Marc Bocquet, Bogdan Penkovsky, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays. CoRR (2019)
Mouhamad Alayan, Eloi Muhr, Alexandre Levisse, Marc Bocquet, Mathieu Moreau, Etienne Nowak, Gabriel Molas, Elisa Vianello, Jean-Michel Portal
Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays. IEEE Trans. Circuits Syst. II Express Briefs (5) (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. NANOARCH (2019)
Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. CoRR (2019)
Damien Querlioz, Julie Grollier, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Marc Bocquet, Jean-Michel Portal, Miguel Romera, Philippe Talatchian
Memory-Centric Neuromorphic Computing With Nanodevices. BioCAS (2019)
Mounia Kharbouche-Harrari, Gregory di Pendina, Romain Wacquez, Bernard Dieny, Driss Aboulkassimi, Jérémy Postel-Pellerin, Jean-Michel Portal
Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis. ISCAS (2019)
Mounia Kharbouche-Harrari, Romain Wacquez, Gregory di Pendina, Jean-Max Dutertre, Jérémy Postel-Pellerin, Driss Aboulkassimi, Jean-Michel Portal
Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAM. IOLTS (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. CoRR (2019)
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks. CoRR (2019)
Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal
RRAM Crossbar Arrays for Storage Class Memory Applications: Throughput and Density Considerations. DCIS (2018)
Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard
An Ultra-Low Power and High Performance Single Ended Sense Amplifier for Low Voltage Flash Memories. J. Low Power Electron. 14 (1) (2018)
Elena Ioana Vatajelu, Lorena Anghel, Jean-Michel Portal, Marc Bocquet, Guillaume Prenat
Resistive and Spintronic RAMs: Device, Simulation, and Applications. IOLTS (2018)
Mounia Kharbouche-Harrari, Jérémy Postel-Pellerin, Gregory di Pendina, Romain Wacquez, Driss Aboulkassimi, Marc Bocquet, R. Sousa, R. Delattre, Jean-Michel Portal
Impact of a Laser Pulse on a STT-MRAM Bitcell: Security and Reliability Issues. IOLTS (2018)
Mathieu Moreau, Eloi Muhr, Marc Bocquet, Hassen Aziza, Jean-Michel Portal, Bastien Giraud, Jean-Philippe Noel
Reliable ReRAM-based Logic Operations for Computing in Memory. VLSI-SoC (2018)
T. Kempf, Vincenzo Della Marca, L. Baron, F. Maugain, F. La Rosa, Stephan Niel, Arnaud Régnier, Jean-Michel Portal, Pascal Masson
Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chip. IRPS (2018)
Mahesh Nataraj, Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Pascal Andreas Meinerzhagen, Jean-Michel Portal, Pierre-Emmanuel Gaillardon
Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop. ISCAS (2017)
Alexandre Levisse, Pablo Royer, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal
Architecture, design and technology guidelines for crosspoint memories. NANOARCH (2017)
Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza
Power efficiency optimization of charge pumps in embedded low voltage NOR flash memory. NORCAS (2017)
Steve Ngueya W., Jean-Michel Portal, Hassen Aziza, Julien Mellier, Stephane Ricard
A Power Efficient Regulated Charge Pump Based on Charge Sharing for Contactless Devices: An Alternative to Four-Phase Charge Pumps. J. Low Power Electron. 13 (4) (2017)
Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza
High voltage recycling scheme to improve power consumption of regulated charge pumps. PATMOS (2017)
Steve Ngueya W., Julien Mellier, Stephane Ricard, Jean-Michel Portal, Hassen Aziza
An Ultra-Low Power and High Speed Single Ended Sense Amplifier for Non-Volatile Memories. NGCAS (2017)
Alexis Krakovinsky, Marc Bocquet, Romain Wacquez, Jean Coignus, Jean-Michel Portal
Thermal laser attack and high temperature heating on HfO2-based OxRAM cells. IOLTS (2017)
Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal
High density emerging resistive memories: What are the limits? LASCAS (2017)
Alexandre Levisse, Bastien Giraud, Jean-Philippe Noel, Mathieu Moreau, Jean-Michel Portal
Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures. NANOARCH (2016)
Hassen Aziza, Haithem Ayari, Santhosh Onkaraiah, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet
Multilevel operation in oxide based resistive RAM with SET voltage modulation. DTIS (2016)
Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal
Optimization of a Particles Detection Chain Based on a VCO Structure. J. Electron. Test. 32 (1) (2016)
Hassen Aziza, Jean-Michel Portal
Resistive RAM variability monitoring using a ring oscillator based test chip. Microelectron. Reliab. 64 (2016)
Jordan Innocenti, Franck Julien, Jean-Michel Portal, Laurent Lopez, Q. Hubert, Pascal Masson, Jacques Sonzogni, Stephan Niel, Arnaud Régnier
Layout optimizations to decrease internal power and area in digital CMOS standard cells. MIPRO (2015)
Jordan Innocenti, Loïc Welter, Nicolas Borrel, Franck Julien, Jean-Michel Portal, Jacques Sonzogni, Laurent Lopez, Pascal Masson, Stephan Niel, Philippe Dreux, Julia Castellan
Dynamic current reduction of CMOS digital circuits through design and process optimization. PATMOS (2015)
Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Mathieu Moreau, Jean-Michel Portal
SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures. NVMTS (2015)
Loic Welter, J. L. Scotto di Quaquero, Philippe Dreux, Laurent Lopez, Hassen Aziza, Jean-Michel Portal
Improvement of MOSFET matching characterization with calibrated multiplexed test structure. Microelectron. Reliab. 55 (9-10) (2015)
Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal
Low cost built-in-tuning of on-chip passive filters for low-if double quadrature rf receiver. LATS (2015)
Karine Coulié-Castellani, Wenceslas Rahajandraibe, Hassen Aziza, Jean-Michel Portal, Gilles Micolau
Improvement of a detection chain based on a VCO concept for microelectronic reliability under natural radiative environment. LATS (2015)
Karine Coulié-Castellani, Wenceslas Rahajandraibe, Gilles Micolau, Hassen Aziza, Jean-Michel Portal
Improvement of a VCO concept for low energy particule detection and recognition. LATW (2014)
Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2014)
A. El Amraoui, Marc Bocquet, F. Barros, Jean-Michel Portal, M. Charbonneau, Stéphanie Jacob, Jacqueline Bablet, Mohamed Benwadih, Vincent Fischer, Romain Coppard, R. Gwoziecky
Printed complementary organic thin film transistors based decoder for ferroelectric memory. ESSCIRC (2014)
Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Coulié-Castellani, Jean-Michel Portal
Low Power Radio Frequency Transceiver with Built-In-Tuning of the Local Oscillator for Open Loop Modulation. J. Low Power Electron. 10 (1) (2014)
Fabien Clermidy, Natalija Jovanovic, Santhosh Onkaraiah, Houcine Oucheikh, Olivier Thomas, Ogun Turkyilmaz, Elisa Vianello, Jean-Michel Portal, Marc Bocquet
Resistive memories: Which applications? DATE (2014)
Nenad Jovanovic, Olivier Thomas, Elisa Vianello, Jean-Michel Portal, Bosko Nikolic, Lirida A. B. Naviner
OxRAM-based non volatile flip-flop in 28nm FDSOI. NEWCAS (2014)
Ogun Turkyilmaz, Santhosh Onkaraiah, Marina Reyboz, Fabien Clermidy, Hraziia, Costin Anghel, Jean-Michel Portal, Marc Bocquet
RRAM-based FPGA for "Normally Off, Instantly On" applications. J. Parallel Distributed Comput. 74 (6) (2014)
Loic Welter, Philippe Dreux, Hassen Aziza, Jean-Michel Portal
An innovative standard cells remapping method for in-circuit critical parameters monitoring. IOLTS (2014)
Loic Welter, Philippe Dreux, Jordan Innocenti, Hassen Aziza, Jean-Michel Portal
Accurate multiplexed test structure for threshold voltage matching evaluation. DTIS (2014)
Jordan Innocenti, Loic Welter, Franck Julien, Laurent Lopez, Jacques Sonzogni, Stephan Niel, Arnaud Régnier, Emmanuel Paire, Karen Labory, Eric Denis, Jean-Michel Portal, Pascal Masson
Dynamic power reduction through process and design optimizations on CMOS 80 nm embedded non-volatile memories technology. MWSCAS (2014)
Hassen Aziza, Haithem Ayari, Santhosh Onkaraiah, Jean-Michel Portal, Mathieu Moreau, Marc Bocquet
Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variability. DFT (2014)
Weisheng Zhao, Jean-Michel Portal, Wang Kang, Mathieu Moreau, Yue Zhang, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. J. Parallel Distributed Comput. 74 (6) (2014)
Santhosh Onkaraiah, Ogun Turkyilmaz, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller
A hybrid CBRAM/CMOS Look-Up-Table structure for improving performance efficiency of Field-Programmable-Gate-Array. ISCAS (2013)
Hassen Aziza, Marc Bocquet, Jean-Michel Portal, Mathieu Moreau, Christophe Muller
A novel test structure for OxRRAM process variability evaluation. Microelectron. Reliab. 53 (9-11) (2013)
Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal
Built-in tuning of the local oscillator for open loop modulation of low cost, low power RF transceiver. LATW (2013)
Loic Welter, Philippe Dreux, Jean-Michel Portal, Hassen Aziza
Embedded high-precision frequency-based capacitor measurement system. IOLTS (2013)
Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
Synchronous full-adder based on complementary resistive switching memory cells. NEWCAS (2013)
Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal, Jamel Nebhen, Hervé Barthélemy
Low-cost auto-calibration of passive polyphase filter in image reject receiver. ICECS (2013)
Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal
On the investigation of built-in tuning of RF receivers using on-chip polyphase filters. VTS (2013)
Santhosh Onkaraiah, Marc Belleville, Marina Reyboz, Fabien Clermidy, Elisa Vianello, Jean-Michel Portal, Christophe Muller
A CBRAM-based compact interconnect switch for non-volatile reconfigurable logic circuits. ICICDT (2013)
Hassen Aziza, Marc Bocquet, Mathieu Moreau, Jean-Michel Portal
Single-ended sense amplifier robustness evaluation for OxRRAM technology. IDT (2013)
Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao
Analytical study of complementary memristive synchronous logic gates. NANOARCH (2013)
Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour
DCG-FGT transistor: Retention study of Floating Gate charge. MWSCAS (2013)
Karine Castellani-Coulié, Marc Bocquet, Hassen Aziza, Jean-Michel Portal, Wenceslas Rahajandraibe, Christophe Muller
SPICE level analysis of Single Event Effects in an OxRRAM cell. LATW (2013)
Karine Castellani-Coulié, Hassen Aziza, Wenceslas Rahajandraibe, Gilles Micolau, Jean-Michel Portal
Investigation of a CMOS oscillator concept for particle detection and diagnosis. LATW (2012)
Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal
Built-in tuning of RFIC Passive Polyphase Filter by process and thermal monitoring. LATW (2012)
Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour
PSP based DCG-FGT transistor Model: Full characterization procedure. ISCIT (2012)
Karine Castellani-Coulié, Hassen Aziza, Gilles Micolau, Jean-Michel Portal
Optimization of SEU Simulations for SRAM Cells Reliability under Radiation. J. Electron. Test. 28 (3) (2012)
Abderrezak Marzaki, V. Bidal, Romain Laffont, Wenceslas Rahajandraibe, Jean-Michel Portal, Rachid Bouchakour
A new adustable Schmitt Trigger based on Dual Control Gate-Floating Gate Transistor (DCG-FGT). MWSCAS (2012)
Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Damien Querlioz, Djaafar Chabi, Dafine Ravelosona, Claude Chappert, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
Crossbar architecture based on 2R complementary resistive switching memory cell. NANOARCH (2012)

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Publication Activity (10 Years)

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Jean-Michel Portal