Claude Chappert

Publication Activity (10 Years)

Years Active: 2007-2015
Publications (10 Years): 0

Top Topics

Computing Paradigm

Reliability Analysis

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Microelectron. Reliab.

Publications

Wang Kang, Liuyang Zhang, Weisheng Zhao, Jacques-Olivier Klein, Youguang Zhang, Dafine Ravelosona, Claude Chappert
Yield and Reliability Improvement Techniques for Emerging Nonvolatile STT-MRAM. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (1) (2015)
Wang Kang, Yue Zhang, Zhaohao Wang, Jacques-Olivier Klein, Claude Chappert, Dafine Ravelosona, Gefei Wang, Youguang Zhang, Weisheng Zhao
Spintronics: Emerging Ultra-Low-Power Circuits and Systems beyond MOS Technology. ACM J. Emerg. Technol. Comput. Syst. 12 (2) (2015)
Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2014)
Zhaohao Wang, Weisheng Zhao, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Claude Chappert
Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture. IJCNN (2014)
Djaafar Chabi, Weisheng Zhao, Erya Deng, Yue Zhang, Nesrine Ben Romdhane, Jacques-Olivier Klein, Claude Chappert
Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2014)
Wang Kang, Weisheng Zhao, Zhaohao Wang, Jacques-Olivier Klein, Yue Zhang, Djaafar Chabi, Youguang Zhang, Dafine Ravelosona, Claude Chappert
An overview of spin-based integrated circuits. ASP-DAC (2014)
Yue Zhang, Weisheng Zhao, Jacques-Olivier Klein, Wang Kang, Damien Querlioz, Youguang Zhang, Dafine Ravelosona, Claude Chappert
Spintronics for low-power computing. DATE (2014)
Weisheng Zhao, Jean-Michel Portal, Wang Kang, Mathieu Moreau, Yue Zhang, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. J. Parallel Distributed Comput. 74 (6) (2014)
Weisheng Zhao, Jacques-Olivier Klein, Zhaohao Wang, Yue Zhang, Nesrine Ben Romdhane, Damien Querlioz, Dafine Ravelosona, Claude Chappert
Spin-electronics based logic fabrics. VLSI-SoC (2013)
Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
Synchronous full-adder based on complementary resistive switching memory cells. NEWCAS (2013)
Weisheng Zhao, Guillaume Prenat, Jacques-Olivier Klein, Bernard Dieny, Claude Chappert, Dafine Ravelosona
Emerging hybrid logic circuits based on non-volatile magnetic memories. NEWCAS (2013)
Hong-Phuc Trinh, Weisheng Zhao, Jacques-Olivier Klein, Yue Zhang, Dafine Ravelosona, Claude Chappert
Magnetic Adder Based on Racetrack Memory. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2013)
Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao
Analytical study of complementary memristive synchronous logic gates. NANOARCH (2013)
Wang Kang, Weisheng Zhao, Zhaohao Wang, Yue Zhang, Jacques-Olivier Klein, Youguang Zhang, Claude Chappert, Dafine Ravelosona
A low-cost built-in error correction circuit design for STT-MRAM reliability improvement. Microelectron. Reliab. 53 (9-11) (2013)
Djaafar Chabi, Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Claude Chappert
Low power magnetic flip-flop based on checkpointing and self-enable mechanism. NEWCAS (2013)
Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Damien Querlioz, Djaafar Chabi, Dafine Ravelosona, Claude Chappert, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
Crossbar architecture based on 2R complementary resistive switching memory cell. NANOARCH (2012)
Weisheng Zhao, Sumanta Chaudhuri, Celso Accoto, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
Cross-point architecture for spin transfer torque magnetic random access memory CoRR (2012)
Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert
MRAM crossbar based configurable logic block. ISCAS (2012)
Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein, Djaafar Chabi, Claude Chappert
Nanodevice-based novel computing paradigms and the neuromorphic approach. ISCAS (2012)
Weisheng Zhao, Yue Zhang, Thibaut Devolder, Jacques-Olivier Klein, Dafine Ravelosona, Claude Chappert, Pascale Mazoyer
Failure and reliability analysis of STT-MRAM. Microelectron. Reliab. 52 (9-10) (2012)
Weisheng Zhao, Lionel Torres, Yoann Guillemenet, Luis Vitório Cargnini, Yahya Lakys, Jacques-Olivier Klein, Dafine Ravelosona, Gilles Sassatelli, Claude Chappert
Design of MRAM based logic circuits and its applications. ACM Great Lakes Symposium on VLSI (2011)
Weisheng Zhao, Thibaut Devolder, Yahya Lakys, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
Design considerations and strategies for high-reliable STT-MRAM. Microelectron. Reliab. 51 (9-11) (2011)
Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert
Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power. ARC (2011)
Weisheng Zhao, Yue Zhang, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, D. Revelosona, Claude Chappert, Lionel Torres, Luis Vitório Cargnini, Raphael Martins Brum, Yoann Guillemenet, Gilles Sassatelli
Embedded MRAM for high-speed computing. VLSI-SoC (2011)
Weisheng Zhao, Lionel Torres, Luis Vitório Cargnini, Raphael Martins Brum, Yue Zhang, Yoann Guillemenet, Gilles Sassatelli, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, Dafine Ravelosona, Claude Chappert
High Performance SoC Design Using Magnetic Logic and Memory. VLSI-SoC (Selected Papers) (2011)
Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
High Density Asynchronous LUT Based on Non-volatile MRAM Technology. FPL (2010)
Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
Design of embedded MRAM macros for memory-in-logic applications. ACM Great Lakes Symposium on VLSI (2010)
Weisheng Zhao, Eric Belhaire, Claude Chappert, Bernard Dieny, Guillaume Prenat
TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA. ACM Trans. Reconfigurable Technol. Syst. 2 (2) (2009)
Weisheng Zhao, Eric Belhaire, Claude Chappert, Pascale Mazoyer
Spin transfer torque (STT)-MRAM-based runtime reconfiguration FPGA circuit. ACM Trans. Embed. Comput. Syst. 9 (2) (2009)
Franck Badets, Lieven Lagae, Sven Cornelissen, Thibaut Devolder, Claude Chappert
Injection locked CMOS buffer dedicated to nanomagnetic based voltage controlled oscillator. ICECS (2008)
Weisheng Zhao, Eric Belhaire, Claude Chappert, Pascale Mazoyer
Spintronic Device Based Non-volatile Low Standby Power SRAM. ISVLSI (2008)
Weisheng Zhao, Eric Belhaire, Bernard Dieny, Guillaume Prenat, Claude Chappert
TAS-MRAM based Non-volatile FPGA logic circuit. FPT (2007)
Jacques-Olivier Klein, Eric Belhaire, Claude Chappert, Florent Ouchet, Russell Cowburn, Dan Read, Dorothee Petit
Synthesis of Finite State Machines with Magnetic Domain Wall Logic. ISCAS (2007)