Jacques-Olivier Klein

Publication Activity (10 Years)

Years Active: 2002-2023
Publications (10 Years): 36

Top Topics

Error Tolerance

Biologically Plausible

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Samy Chali, Inna Kucher, Marc Duranton, Jacques-Olivier Klein
Improving Normalizing Flows with the Approximate Mass for Out-of-Distribution Detection. CVPR Workshops (2023)
Atreya Majumdar, Marc Bocquet, Tifenn Hirtzlin, Axel Laborieux, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks. CoRR (2021)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Implementation of Ternary Weights With Resistive RAM Using a Single Sense Operation Per Synapse. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (1) (2021)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Liza Herrera Diez, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. AICAS (2020)
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Embracing the Unreliability of Memory Devices for Neuromorphic Computing. CoRR (2020)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Implementation of Ternary Weights with Resistive RAM Using a Single Sense Operation per Synapse. CoRR (2020)
Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. DATE (2020)
Bogdan Penkovsky, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications. CoRR (2020)
Axel Laborieux, Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Liza Herrera Diez, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse. CoRR (2020)
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Embracing the Unreliability of Memory Devices for Neuromorphic Computing. IRPS (2020)
Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. AICAS (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Marc Bocquet, Jacques-Olivier Klein, Jean-Michel Portal, Damien Querlioz
Stochastic Computing for Hardware Implementation of Binarized Neural Networks. IEEE Access 7 (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Marc Bocquet, Jacques-Olivier Klein, Jean-Michel Portal, Damien Querlioz
Stochastic Computing for Hardware Implementation of Binarized Neural Networks. CoRR (2019)
Qi An, Sébastien Le Beux, Ian O'Connor, Jacques-Olivier Klein
A comprehensive compact model for the design of all-spin-logic based circuits. Microelectron. J. 92 (2019)
Tifenn Hirtzlin, Marc Bocquet, Bogdan Penkovsky, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays. CoRR (2019)
Guanda Wang, Yue Zhang, Beibei Zhang, Bi Wu, Jiang Nan, Xueying Zhang, Zhizhong Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Zhaohao Wang, Youguang Zhang, Weisheng Zhao
Ultra-Dense Ring-Shaped Racetrack Memory Cache Design. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. NANOARCH (2019)
Christopher H. Bennett, Vivek Parmar, Laurie E. Calvet, Jacques-Olivier Klein, Manan Suri, Matthew J. Marinella, Damien Querlioz
Contrasting Advantages of Learning With Random Weights and Backpropagation in Non-Volatile Memory Neural Networks. IEEE Access 7 (2019)
Tifenn Hirtzlin, Marc Bocquet, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks. CoRR (2019)
Damien Querlioz, Julie Grollier, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Marc Bocquet, Jean-Michel Portal, Miguel Romera, Philippe Talatchian
Memory-Centric Neuromorphic Computing With Nanodevices. BioCAS (2019)
Tifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean-Michel Portal, Damien Querlioz
Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction. CoRR (2019)
Marc Bocquet, Tifenn Hirtzlin, Jacques-Olivier Klein, Etienne Nowak, Elisa Vianello, Jean-Michel Portal, Damien Querlioz
In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks. CoRR (2019)
Christopher H. Bennett, Jean-Etienne Lorival, François Marc, Theo Cabaret, Bruno Jousselme, Vincent Derycke, Jacques-Olivier Klein, Cristell Maneux
Multiscaled Simulation Methodology for Neuro-Inspired Circuits Demonstrated with an Organic Memristor. IEEE Trans. Multi Scale Comput. Syst. 4 (4) (2018)
Qi An, Sébastien Le Beux, Ian O'Connor, Jacques-Olivier Klein
Large scale, high density integration of all spin logic. DATE (2018)
Christopher H. Bennett, Damien Querlioz, Jacques-Olivier Klein
Spatio-temporal Learning with Arrays of Analog Nanosynapses. CoRR (2017)
Salmen Mraihi, El Mehdi Boujamaa, Cyrille Dray, Jacques-Olivier Klein
Offset Analysis and Design Optimization of a Dynamic Sense Amplifier for Resistive Memories. ISVLSI (2017)
Christopher H. Bennett, Damien Querlioz, Jacques-Olivier Klein
Spatio-temporal learning with arrays of analog nanosynapses. NANOARCH (2017)
Qi An, Sébastien Le Beux, Ian O'Connor, Jacques-Olivier Klein, Weisheng Zhao
Arithmetic Logic Unit based on all-spin logic devices. NEWCAS (2017)
You Wang, Hao Cai, Lirida A. B. Naviner, Jacques-Olivier Klein, Jianlei Yang, Weisheng Zhao
A novel circuit design of true random number generator using magnetic tunnel junction. NANOARCH (2016)
Yue Zhang, Chao Zhang, Jiang Nan, Zhizhong Zhang, Xueying Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao
Perspectives of Racetrack Memory for Large-Capacity On-Chip Memory: From Device to System. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2016)
Y. Wang, Hao Cai, Lirida A. B. Naviner, X. X. Zhao, Yue Zhang, Mariem Slimani, Jacques-Olivier Klein, Weisheng Zhao
A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI. Microelectron. Reliab. 64 (2016)
Deming Zhang, Lang Zeng, Kaihua Cao, Mengxing Wang, Shouzhong Peng, Yue Zhang, Youguang Zhang, Jacques-Olivier Klein, Yu Wang, Weisheng Zhao
All Spin Artificial Neural Networks Based on Compound Spintronic Synapse and Neuron. IEEE Trans. Biomed. Circuits Syst. 10 (4) (2016)
Deming Zhang, Lang Zeng, Youguang Zhang, Weisheng Zhao, Jacques-Olivier Klein
Stochastic spintronic device based synapses and spiking neurons for neuromorphic computation. NANOARCH (2016)
Christopher H. Bennett, Selina La Barbera, Adrien F. Vincent, Jacques-Olivier Klein, Fabien Alibart, Damien Querlioz
Exploiting the short-term to long-term plasticity transition in memristive nanodevice learning architectures. IJCNN (2016)
Christopher H. Bennett, Damien Querlioz, Jacques-Olivier Klein
A recurrent crossbar of memristive nanodevices implements online novelty detection. ICRC (2016)
Yi Ran, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Weisheng Zhao
Read disturbance issue and design techniques for nanoscale STT-MRAM. J. Syst. Archit. 71 (2016)
Nicolas Locatelli, Damir Vodenicarevic, Weisheng Zhao, Jacques-Olivier Klein, Julie Grollier, Damien Querlioz
Vortex-based spin transfer oscillator compact model for IC design. ISCAS (2015)
Yue Zhang, Chao Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao
Perspectives of racetrack memory based on current-induced domain wall motion: From device to system. ISCAS (2015)
Y. Wang, Hao Cai, Lirida A. B. Naviner, Yue Zhang, Jacques-Olivier Klein, Weisheng Zhao
Compact thermal modeling of spin transfer torque magnetic tunnel junction. Microelectron. Reliab. 55 (9-10) (2015)
Wang Kang, Liuyang Zhang, Weisheng Zhao, Jacques-Olivier Klein, Youguang Zhang, Dafine Ravelosona, Claude Chappert
Yield and Reliability Improvement Techniques for Emerging Nonvolatile STT-MRAM. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (1) (2015)
Christopher H. Bennett, Djaafar Chabi, Theo Cabaret, Bruno Jousselme, Vincent Derycke, Damien Querlioz, Jacques-Olivier Klein
Supervised learning with organic memristor devices and prospects for neural crossbar arrays. NANOARCH (2015)
Erya Deng, You Wang, Zhaohao Wang, Jacques-Olivier Klein, Bernard Dieny, Guillaume Prenat, Weisheng Zhao
Robust magnetic full-adder with voltage sensing 2T/2MTJ cell. NANOARCH (2015)
Liuyang Zhang, Wang Kang, Youguang Zhang, Yuanqing Cheng, Lang Zeng, Jacques-Olivier Klein, Weisheng Zhao
Channel Modeling and Reliability Enhancement Design Techniques for STT-MRAM. ISVLSI (2015)
Djaafar Chabi, Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein
On-Chip Universal Supervised Learning Methods for Neuro-Inspired Block of Memristive Nanodevices. ACM J. Emerg. Technol. Comput. Syst. 11 (4) (2015)
Nicolas Locatelli, Adrien F. Vincent, Alice Mizrahi, Joseph S. Friedman, Damir Vodenicarevic, Joo-Von Kim, Jacques-Olivier Klein, Weisheng Zhao, Julie Grollier, Damien Querlioz
Spintronic devices as key elements for energy-efficient neuroinspired architectures. DATE (2015)
Wang Kang, Yue Zhang, Zhaohao Wang, Jacques-Olivier Klein, Claude Chappert, Dafine Ravelosona, Gefei Wang, Youguang Zhang, Weisheng Zhao
Spintronics: Emerging Ultra-Low-Power Circuits and Systems beyond MOS Technology. ACM J. Emerg. Technol. Comput. Syst. 12 (2) (2015)
Erya Deng, Yue Zhang, Wang Kang, Bernard Dieny, Jacques-Olivier Klein, Guillaume Prenat, Weisheng Zhao
Synchronous 8-bit Non-Volatile Full-Adder based on Spin Transfer Torque Magnetic Tunnel Junction. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2015)
Yi Ran, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Weisheng Zhao
Read disturbance issue for nanoscale STT-MRAM. NVMSA (2015)
Qi An, Li Su, Jacques-Olivier Klein, Sébastien Le Beux, Ian O'Connor, Weisheng Zhao
Full-adder circuit design based on all-spin logic device. NANOARCH (2015)
Guangyu Sun, Chao Zhang, Hehe Li, Yue Zhang, Weiqi Zhang, Yizi Gu, Yinan Sun, Jacques-Olivier Klein, Dafine Ravelosona, Yongpan Liu, Weisheng Zhao, Huazhong Yang
From device to system: cross-layer design exploration of racetrack memory. DATE (2015)
Adrien F. Vincent, Jerome Larroque, Nicolas Locatelli, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Weisheng Zhao, Jacques-Olivier Klein, Sylvie Galdin-Retailleau, Damien Querlioz
Spin-Transfer Torque Magnetic Memory as a Stochastic Memristive Synapse for Neuromorphic Systems. IEEE Trans. Biomed. Circuits Syst. 9 (2) (2015)
Adrien F. Vincent, Jerome Larroque, Weisheng Zhao, Nesrine Ben Romdhane, Olivier Bichler, Christian Gamrat, Jacques-Olivier Klein, Sylvie Galdin-Retailleau, Damien Querlioz
Spin-transfer torque magnetic memory as a stochastic memristive synapse. ISCAS (2014)
Nesrine Ben Romdhane, Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Z. R. Wang, Dafine Ravelosona
Design and analysis of Racetrack memory based on magnetic domain wall motion in nanowires. NANOARCH (2014)
David Roclin, Olivier Bichler, Christian Gamrat, Jacques-Olivier Klein
Sneak paths effects in CBRAM memristive devices arrays for spiking neural networks. NANOARCH (2014)
Weisheng Zhao, Mathieu Moreau, Erya Deng, Yue Zhang, Jean-Michel Portal, Jacques-Olivier Klein, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Damien Querlioz, Nesrine Ben Romdhane, Dafine Ravelosona, Claude Chappert
Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2014)
Zhaohao Wang, Weisheng Zhao, Wang Kang, Youguang Zhang, Jacques-Olivier Klein, Claude Chappert
Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture. IJCNN (2014)
Djaafar Chabi, Weisheng Zhao, Erya Deng, Yue Zhang, Nesrine Ben Romdhane, Jacques-Olivier Klein, Claude Chappert
Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2014)
You Wang, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Lirida A. B. Naviner, Weisheng Zhao
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses. Microelectron. Reliab. 54 (9-10) (2014)
Wang Kang, Weisheng Zhao, Zhaohao Wang, Jacques-Olivier Klein, Yue Zhang, Djaafar Chabi, Youguang Zhang, Dafine Ravelosona, Claude Chappert
An overview of spin-based integrated circuits. ASP-DAC (2014)
Djaafar Chabi, Damien Querlioz, Weisheng Zhao, Jacques-Olivier Klein
Robust learning approach for neuro-inspired nanoscale crossbar architecture. ACM J. Emerg. Technol. Comput. Syst. 10 (1) (2014)
Yue Zhang, Weisheng Zhao, Jacques-Olivier Klein, Wang Kang, Damien Querlioz, Youguang Zhang, Dafine Ravelosona, Claude Chappert
Spintronics for low-power computing. DATE (2014)
Djaafar Chabi, Zhaohao Wang, Weisheng Zhao, Jacques-Olivier Klein
On-chip supervised learning rule for ultra high density neural crossbar using memristor for synapse and neuron. NANOARCH (2014)
Weisheng Zhao, Jean-Michel Portal, Wang Kang, Mathieu Moreau, Yue Zhang, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells. J. Parallel Distributed Comput. 74 (6) (2014)
Wang Kang, Weisheng Zhao, Lun Yang, Jacques-Olivier Klein, Youguang Zhang, Dafine Ravelosona
One-step majority-logic-decodable codes enable STT-MRAM for high speed working memories. NVMSA (2014)
Weisheng Zhao, Jacques-Olivier Klein, Zhaohao Wang, Yue Zhang, Nesrine Ben Romdhane, Damien Querlioz, Dafine Ravelosona, Claude Chappert
Spin-electronics based logic fabrics. VLSI-SoC (2013)
Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
Synchronous full-adder based on complementary resistive switching memory cells. NEWCAS (2013)
Weisheng Zhao, Guillaume Prenat, Jacques-Olivier Klein, Bernard Dieny, Claude Chappert, Dafine Ravelosona
Emerging hybrid logic circuits based on non-volatile magnetic memories. NEWCAS (2013)
Hong-Phuc Trinh, Weisheng Zhao, Jacques-Olivier Klein, Yue Zhang, Dafine Ravelosona, Claude Chappert
Magnetic Adder Based on Racetrack Memory. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2013)
David Roclin, Olivier Bichler, Christian Gamrat, Simon J. Thorpe, Jacques-Olivier Klein
Design study of efficient digital order-based STDP neuron implementations for extracting temporal features. IJCNN (2013)
Jean-Michel Portal, Mathieu Moreau, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Damien Querlioz, Dafine Ravelosona, Claude Chappert, Weisheng Zhao
Analytical study of complementary memristive synchronous logic gates. NANOARCH (2013)
Wang Kang, Weisheng Zhao, Zhaohao Wang, Yue Zhang, Jacques-Olivier Klein, Youguang Zhang, Claude Chappert, Dafine Ravelosona
A low-cost built-in error correction circuit design for STT-MRAM reliability improvement. Microelectron. Reliab. 53 (9-11) (2013)
Djaafar Chabi, Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Claude Chappert
Low power magnetic flip-flop based on checkpointing and self-enable mechanism. NEWCAS (2013)
Weisheng Zhao, Yue Zhang, Jacques-Olivier Klein, Damien Querlioz, Djaafar Chabi, Dafine Ravelosona, Claude Chappert, Jean-Michel Portal, Marc Bocquet, Hassen Aziza, Damien Deleruyelle, Christophe Muller
Crossbar architecture based on 2R complementary resistive switching memory cell. NANOARCH (2012)
Damien Querlioz, Weisheng Zhao, Philippe Dollfus, Jacques-Olivier Klein, Olivier Bichler, Christian Gamrat
Bioinspired networks with nanoscale memristive devices that combine the unsupervised and supervised learning approaches. NANOARCH (2012)
Weisheng Zhao, Sumanta Chaudhuri, Celso Accoto, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
Cross-point architecture for spin transfer torque magnetic random access memory CoRR (2012)
Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert
MRAM crossbar based configurable logic block. ISCAS (2012)
Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein, Djaafar Chabi, Claude Chappert
Nanodevice-based novel computing paradigms and the neuromorphic approach. ISCAS (2012)
Weisheng Zhao, Yue Zhang, Thibaut Devolder, Jacques-Olivier Klein, Dafine Ravelosona, Claude Chappert, Pascale Mazoyer
Failure and reliability analysis of STT-MRAM. Microelectron. Reliab. 52 (9-10) (2012)
Weisheng Zhao, Lionel Torres, Yoann Guillemenet, Luis Vitório Cargnini, Yahya Lakys, Jacques-Olivier Klein, Dafine Ravelosona, Gilles Sassatelli, Claude Chappert
Design of MRAM based logic circuits and its applications. ACM Great Lakes Symposium on VLSI (2011)
Weisheng Zhao, Thibaut Devolder, Yahya Lakys, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
Design considerations and strategies for high-reliable STT-MRAM. Microelectron. Reliab. 51 (9-11) (2011)
Yahya Lakys, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert
Magnetic Look-Up Table (MLUT) Featuring Radiation Hardness, High Performance and Low Power. ARC (2011)
Weisheng Zhao, Yue Zhang, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, D. Revelosona, Claude Chappert, Lionel Torres, Luis Vitório Cargnini, Raphael Martins Brum, Yoann Guillemenet, Gilles Sassatelli
Embedded MRAM for high-speed computing. VLSI-SoC (2011)
Si-Yu Liao, Jean-Marie Retrouvey, Guillaume Agnus, Weisheng Zhao, Cristell Maneux, Sébastien Fregonese, Thomas Zimmer, Djaafar Chabi, Arianna Filoramo, Vincent Derycke, Christian Gamrat, Jacques-Olivier Klein
Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
Weisheng Zhao, Lionel Torres, Luis Vitório Cargnini, Raphael Martins Brum, Yue Zhang, Yoann Guillemenet, Gilles Sassatelli, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, Dafine Ravelosona, Claude Chappert
High Performance SoC Design Using Magnetic Logic and Memory. VLSI-SoC (Selected Papers) (2011)
Djaafar Chabi, Weisheng Zhao, Damien Querlioz, Jacques-Olivier Klein
Robust neural logic block (NLB) based on memristor crossbar array. NANOARCH (2011)
Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
High Density Asynchronous LUT Based on Non-volatile MRAM Technology. FPL (2010)
Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer
Design of embedded MRAM macros for memory-in-logic applications. ACM Great Lakes Symposium on VLSI (2010)
Abdelhafid Elouardi, Samir Bouaziz, Antoine Dupret, Lionel Lacassagne, Jacques-Olivier Klein, Roger Reynaud
A Smart Architecture for Low-Level Image Computing. Int. J. Comput. Sci. Appl. 5 (3a) (2008)
Abdelhafid Elouardi, Samir Bouaziz, Antoine Dupret, Lionel Lacassagne, Jacques-Olivier Klein, Roger Reynaud
Image Processing Vision Systems: Standard Image Sensors Versus Retinas. IEEE Trans. Instrum. Meas. 56 (5) (2007)
Jacques-Olivier Klein, Eric Belhaire, Claude Chappert, Florent Ouchet, Russell Cowburn, Dan Read, Dorothee Petit
Synthesis of Finite State Machines with Magnetic Domain Wall Logic. ISCAS (2007)
Jacques-Olivier Klein, Lionel Lacassagne, Hervé Mathias, Sebastien Moutault, Antoine Dupret
Low Power Image Processing: Analog Versus Digital Comparison. CAMP (2005)
Sebastien Moutault, Hervé Mathias, Jacques-Olivier Klein, Antoine Dupret
An improved analog computation cell for Paris II, a programmable vision chip. ISCAS (5) (2004)
Antoine Dupret, Jacques-Olivier Klein, Abdallah Nshare
A DSP-like analogue processing unit for smart image sensors. Int. J. Circuit Theory Appl. 30 (6) (2002)