Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse.
Axel LaborieuxMarc BocquetTifenn HirtzlinJacques-Olivier KleinLiza Herrera DiezEtienne NowakElisa VianelloJean-Michel PortalDamien QuerliozPublished in: AICAS (2020)
Keyphrases
- low power
- neural network
- power consumption
- low cost
- high speed
- vlsi architecture
- cmos technology
- single chip
- signal processor
- power dissipation
- high power
- digital signal processing
- ultra low power
- learning rules
- main memory
- pattern recognition
- wireless transmission
- low voltage
- mixed signal
- low power consumption
- associative memory
- artificial neural networks
- gate array
- logic circuits
- efficient implementation
- random access memory
- vlsi circuits
- computational power
- signal processing
- vlsi implementation
- delay insensitive
- multi channel