Stochastic Computing for Hardware Implementation of Binarized Neural Networks.
Tifenn HirtzlinBogdan PenkovskyMarc BocquetJacques-Olivier KleinJean-Michel PortalDamien QuerliozPublished in: CoRR (2019)
Keyphrases
- hardware implementation
- neural network
- efficient implementation
- signal processing
- jump diffusion process
- dedicated hardware
- software implementation
- image processing algorithms
- hardware design
- field programmable gate array
- hardware architecture
- pipeline architecture
- pattern recognition
- artificial neural networks
- genetic algorithm
- image binarization
- fuzzy logic
- hopfield neural network
- fpga implementation
- parallel architecture
- back propagation
- rbf network
- document images
- multiresolution
- fpga device
- pipelined architecture
- multilayer perceptron