TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA.
Weisheng ZhaoEric BelhaireClaude ChappertBernard DienyGuillaume PrenatPublished in: ACM Trans. Reconfigurable Technol. Syst. (2009)
Keyphrases
- low power
- high speed
- single chip
- low power consumption
- gate array
- design considerations
- power reduction
- high power
- digital signal processing
- real time
- logic circuits
- wireless transmission
- low cost
- image sensor
- power consumption
- vlsi architecture
- mixed signal
- random access memory
- vlsi circuits
- frame rate
- cmos technology
- focal plane
- hardware and software
- nm technology