Roman Gauchi

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 10

Top Topics

Continuous Query Processing

Design Space Exploration

Memory Management

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Allen Boston, Roman Gauchi, Pierre-Emmanuel Gaillardon
Secure eFPGA Configuration: A System-Level Approach. ARC (2024)
Aurélien Alacchi, Edouard Giacomin, Roman Gauchi, Szymon Kulis, Pierre-Emmanuel Gaillardon
Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures. IEEE Trans. Very Large Scale Integr. Syst. 31 (8) (2023)
Aurélien Alacchi, Edouard Giacomin, Scott Temple, Roman Gauchi, Michael J. Wirthlin, Pierre-Emmanuel Gaillardon
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (5) (2023)
Roman Gauchi, Ashton Snelgrove, Pierre-Emmanuel Gaillardon
An Open-source Three-Independent-Gate FET Standard Cell Library for Mixed Logic Synthesis. ISCAS (2022)
Maha Kooli, Antoine Heraud, Henri-Pierre Charles, Bastien Giraud, Roman Gauchi, Mona Ezzadeen, Kevin Mambu, Valentin Egloff, Jean-Philippe Noel
Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution. ACM J. Emerg. Technol. Comput. Syst. 18 (2) (2022)
Michael Keyser, Roman Gauchi, Pierre-Emmanuel Gaillardon
An Energy-Efficient Three-Independent-Gate FET Cell Library for Low-Power Edge Computing. VLSI-SoC (2022)
Valentin Egloff, Jean-Philippe Noel, Maha Kooli, Bastien Giraud, Lorenzo Ciampolini, Roman Gauchi, César Fuguet Tortolero, Eric Guthmuller, Mathieu Moreau, Jean-Michel Portal
Storage Class Memory with Computing Row Buffer: A Design Space Exploration. DATE (2021)
Roman Gauchi, Valentin Egloff, Maha Kooli, Jean-Philippe Noël, Bastien Giraud, Pascal Vivet, Subhasish Mitra, H.-P. Charles
Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization. ISLPED (2020)
Jean-Philippe Noël, Valentin Egloff, Maha Kooli, Roman Gauchi, Jean-Michel Portal, H.-P. Charles, Pascal Vivet, Bastien Giraud
Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. DATE (2020)
Roman Gauchi, Maha Kooli, Pascal Vivet, Jean-Philippe Noël, Edith Beigné, Subhasish Mitra, H.-P. Charles
Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture. VLSI-SoC (2019)