Pierre-Emmanuel Gaillardon

ORCID

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 130

Top Venues

DATE

ISCAS

CoRR

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Allen Boston, Roman Gauchi, Pierre-Emmanuel Gaillardon
Secure eFPGA Configuration: A System-Level Approach. ARC (2024)
Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon
A Scalable and Area-Efficient Configuration Circuitry for Semi-Custom FPGA Design. IEEE Trans. Very Large Scale Integr. Syst. 31 (8) (2023)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction. IEEE Trans. Very Large Scale Integr. Syst. 31 (10) (2023)
Walter Lau Neto, Yingjie Li, Pierre-Emmanuel Gaillardon, Cunxi Yu
FlowTune: End-to-End Automatic Logic Optimization Exploration via Domain-Specific Multiarmed Bandit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (6) (2023)
Aurélien Alacchi, Edouard Giacomin, Roman Gauchi, Szymon Kulis, Pierre-Emmanuel Gaillardon
Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures. IEEE Trans. Very Large Scale Integr. Syst. 31 (8) (2023)
Grant Brown, Ganesh Gore, Pierre-Emmanuel Gaillardon
Performance Optimized Clock Tree Embedding for Auto-Generated FPGAs. ISVLSI (2023)
Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report. CoRR (2023)
Aman Arora, Atharva Bhamburkar, Aatman Borda, Tanmay Anand, Rishabh Sehgal, Bagus Hanindhito, Pierre-Emmanuel Gaillardon, Jaydeep Kulkarni, Lizy K. John
CoMeFa: Deploying Compute-in-Memory on FPGAs for Deep Learning Acceleration. ACM Trans. Reconfigurable Technol. Syst. 16 (3) (2023)
Dana How, Tim Ansell, Vaughn Betz, Chris Lavin, Ted Speers, Pierre-Emmanuel Gaillardon
Open-source and FPGAs: Hardware, Software, Both or None? FPGA (2023)
Aurélien Alacchi, Edouard Giacomin, Scott Temple, Roman Gauchi, Michael J. Wirthlin, Pierre-Emmanuel Gaillardon
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (5) (2023)
Aurélien Alacchi, Pierre-Emmanuel Gaillardon
Programmable Local Clock SET Filtering for SEE-Resistant FPGA. IEEE Trans. Circuits Syst. II Express Briefs 69 (9) (2022)
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
ALICE: An Automatic Design Flow for eFPGA Redaction. CoRR (2022)
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
ALICE: an automatic design flow for eFPGA redaction. DAC (2022)
Walter Lau Neto, Luca G. Amarù, Vinicius Possani, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon
Improving LUT-based optimization for ASICs. DAC (2022)
Ashton Snelgrove, Pierre-Emmanuel Gaillardon
Programmable logic elements using multigate ambipolar transistors. DDECS (2022)
Roman Gauchi, Ashton Snelgrove, Pierre-Emmanuel Gaillardon
An Open-source Three-Independent-Gate FET Standard Cell Library for Mixed Logic Synthesis. ISCAS (2022)
Thomas Becnel, Kerry Kelly, Pierre-Emmanuel Gaillardon
Tiny Time-Series Transformers: Realtime Multi-Target Sensor Inference At The Edge. COINS (2022)
Michael Keyser, Roman Gauchi, Pierre-Emmanuel Gaillardon
An Energy-Efficient Three-Independent-Gate FET Cell Library for Low-Power Edge Computing. VLSI-SoC (2022)
Gabriel Ammes, Walter Lau Neto, Paulo F. Butzen, Pierre-Emmanuel Gaillardon, Renato P. Ribas
A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Walter Lau Neto, Yingjie Li, Pierre-Emmanuel Gaillardon, Cunxi Yu
End-to-end Automatic Logic Optimization Exploration via Domain-specific Multi-armed Bandit. CoRR (2022)
Aurélien Alacchi, Edouard Giacomin, Xifan Tang, Pierre-Emmanuel Gaillardon
Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs. ISCAS (2021)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Exploring eFPGA-based Redaction for IP Protection. ICCAD (2021)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Exploring eFPGA-based Redaction for IP Protection. CoRR (2021)
Scott Temple, Walter Lau Neto, Ashton Snelgrove, Xifan Tang, Pierre-Emmanuel Gaillardon
Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis. DAC (2021)
Adi Eliahu, Ronny Ronen, Pierre-Emmanuel Gaillardon, Shahar Kvatinsky
multiPULPly: A Multiplication Engine for Accelerating Neural Networks on Ultra-low-power Architectures. ACM J. Emerg. Technol. Comput. Syst. 17 (2) (2021)
Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon
A Scalable and Robust Hierarchical Floorplanning to Enable 24-hour Prototyping for 100k-LUT FPGAs. ISPD (2021)
Walter Lau Neto, Matheus T. Moreira, Yingjie Li, Luca G. Amarù, Cunxi Yu, Pierre-Emmanuel Gaillardon
SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping. DAC (2021)
Matthieu Couriol, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A 12-pA Resolution Sigma Delta ADC Topology for Chemiresistive Sensor-Based Applications. VLSI-SoC (2021)
Gabriel Ammes, Walter Lau Neto, Paulo F. Butzen, Pierre-Emmanuel Gaillardon, Renato P. Ribas
A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal. CoRR (2021)
Walter Lau Neto, Matheus Trevisan Moreira, Luca G. Amarù, Cunxi Yu, Pierre-Emmanuel Gaillardon
Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization. ASP-DAC (2021)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction. CoRR (2021)
Grant Brown, Valerio Tenace, Pierre-Emmanuel Gaillardon
NEMO-CNN: An Efficient Near-Memory Accelerator for Convolutional Neural Networks. ASAP (2021)
Xifan Tang, Ganesh Gore, Grant Brown, Pierre-Emmanuel Gaillardon
Taping out an FPGA in 24 hours with OpenFPGA: The SOFA Project. FPL (2021)
Sherief Reda, Leon Stok, Pierre-Emmanuel Gaillardon
Guest Editors' Introduction: The Resurgence of Open- Source EDA Technology. IEEE Des. Test 38 (2) (2021)
Edouard Giacomin, Francky Catthoor, Pierre-Emmanuel Gaillardon
Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow. ISCAS (2021)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE (2021)
Matthieu Couriol, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A Novel High-Gain Amplifier Circuit Using Super-Steep-Subthreshold-Slope Field-Effect Transistors. VLSI-SoC (2021)
Matthieu Couriol, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A First Approach in Using Super-Steep-Subthreshold-Slope Field-Effect Transistors in Ultra-Low Power Analog Design. VLSI-SoC (Selected Papers) (2021)
Thomas Becnel, Pierre-Emmanuel Gaillardon
A Deep Learning Approach to Sensor Fusion Inference at the Edge. DATE (2021)
Edouard Giacomin, Jürgen Bömmels, Julien Ryckaert, Francky Catthoor, Pierre-Emmanuel Gaillardon
Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow. VLSI-SOC (2020)
Surya Narayanan, Karl Taht, Rajeev Balasubramonian, Edouard Giacomin, Pierre-Emmanuel Gaillardon
SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks. ISCA (2020)
Max Austin, Scott Temple, Walter Lau Neto, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
A Scalable Mixed Synthesis Framework for Heterogeneous Networks. DATE (2020)
Xifan Tang, Edouard Giacomin, Baudouin Chauviere, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs. IEEE Micro 40 (4) (2020)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR (2020)
Mohammad Mehdi Sharifi, Ramin Rajaei, Patsy Cadareanu, Pierre-Emmanuel Gaillardon, Yier Jin, Michael T. Niemier, Xiaobo Sharon Hu
A Novel TIGFET-based DFF Design for Improved Resilience to Power Side-Channel Attacks. DATE (2020)
Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Extending Boolean Methods for Scalable Logic Synthesis. IEEE Access 8 (2020)
Xifan Tang, Edouard Giacomin, Patsy Cadareanu, Ganesh Gore, Pierre-Emmanuel Gaillardon
A RRAM-based FPGA for Energy-efficient Edge Computing. DATE (2020)
Edouard Giacomin, Jürgen Bömmels, Julien Ryckaert, Francky Catthoor, Pierre-Emmanuel Gaillardon
3D Nanofabric: Layout Challenges and Solutions for Ultra-scaled Logic Designs. VLSI-SoC (Selected Papers) (2020)
Walter Lau Neto, Vinicius N. Possani, Felipe S. Marranghello, Jody Maick Matos, Pierre-Emmanuel Gaillardon, André Inácio Reis, Renato Perez Ribas
Exact Benchmark Circuits for Logic Synthesis. IEEE Des. Test 37 (3) (2020)
Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
Wire-Aware Architecture and Dataflow for CNN Accelerators. MICRO (2019)
Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Scalable Boolean Methods in a Modern Synthesis Flow. DATE (2019)
Edouard Giacomin, Tzofnat Greenberg-Toledo, Shahar Kvatinsky, Pierre-Emmanuel Gaillardon
A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2019)
Walter Lau Neto, Max Austin, Scott Temple, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper. ICCAD (2019)
Ganesh Gore, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. VLSI-SoC (2019)
Walter Lau Neto, Xifan Tang, Max Austin, Luca G. Amarù, Pierre-Emmanuel Gaillardon
Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs. ISVLSI (2019)
Patsy Cadareanu, N. Reddy C, Carmen G. Almudéver, A. Khanna, Arijit Raychowdhury, Suman Datta, Koen Bertels, Vijayakrishan Narayanan, Massimiliano Di Ventra, Pierre-Emmanuel Gaillardon
Rebooting Our Computing Models. DATE (2019)
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories. VLSI-SoC (2019)
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
A Study on Switch Block Patterns for Tileable FPGA Routing Architectures. FPT (2019)
Patsy Cadareanu, Ganesh Gore, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. VLSI-SoC (Selected Papers) (2019)
Thomas Becnel, Tofigh Sayahi, Kerry Kelly, Pierre-Emmanuel Gaillardon
A Recursive Approach to Partially Blind Calibration of a Pollution Sensor Network. ICESS (2019)
Alexandre Levisse, Marco Rios, William Andrew Simon, Pierre-Emmanuel Gaillardon, David Atienza
Functionality Enhanced Memories for Edge-AI Embedded Systems. NVMTS (2019)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 27 (3) (2019)
Anirban Nag, C. N. Ramachandra, Rajeev Balasubramonian, Ryan Stutsman, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment. MICRO (2019)
Thomas Becnel, Kyle Tingey, Jonathan Whitaker, Tofigh Sayahi, Katrina Lê, Pascal Goffin, Anthony Butterfield, Kerry Kelly, Pierre-Emmanuel Gaillardon
A Distributed Low-Cost Pollution Monitoring Platform. IEEE Internet Things J. 6 (6) (2019)
Giovanni V. Resta, Alessandra Leonhardt, Yashwanth Balaji, Stefan De Gendt, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. 27 (7) (2019)
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
Accelerating Inference on Binary Neural Networks with Digital RRAM Processing. VLSI-SoC (Selected Papers) (2019)
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Baudouin Chauviere, Pierre-Emmanuel Gaillardon
OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs. FPL (2019)
Shubham Rai, Srivatsa Rangachar Srinivasa, Patsy Cadareanu, Xunzhao Yin, Xiaobo Sharon Hu, Pierre-Emmanuel Gaillardon, Vijaykrishnan Narayanan, Akash Kumar
Emerging reconfigurable nanotechnologies: can they support future electronics? ICCAD (2018)
Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Logic Synthesis for RRAM-Based In-Memory Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (7) (2018)
Nishil Talati, Ameer Haj Ali, Rotem Ben Hur, Nimrod Wald, Ronny Ronen, Pierre-Emmanuel Gaillardon, Shahar Kvatinsky
Practical challenges in delivering the promises of real processing-in-memory machines. DATE (2018)
Giovanni V. Resta, Jorge Romero Gonzalez, Yashwanth Balaji, Tarun Agarwal, Dennis Lin, Francky Catthoor, Iuliana P. Radu, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Towards high-performance polarity-controllable FETs with 2D materials. DATE (2018)
Jorge Romero Gonzalez, Pierre-Emmanuel Gaillardon
An Efficient Adder Architecture with Three- Independent-Gate Field-Effect Transistors. ICRC (2018)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Post-P&R Performance and Power Analysis for RRAM-Based FPGAs. IEEE J. Emerg. Sel. Topics Circuits Syst. 8 (3) (2018)
Said Hamdioui, Pierre-Emmanuel Gaillardon, Dietmar Fey, Tajana Simunic Rosing
Guest Editorial Memristive-Device-Based Computing. IEEE Trans. Very Large Scale Integr. Syst. 26 (12) (2018)
Giovanni V. Resta, Yashwanth Balaji, Dennis Lin, Iuliana P. Radu, Francky Catthoor, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Doping-free complementary inverter enabled by 2D WSe2 electrostatically-doped reconfigurable transistors. DRC (2018)
Edouard Giacomin, Pierre-Emmanuel Gaillardon
Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect Transistors. VLSI-SoC (2018)
Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
A High-Performance FPGA Architecture Using One-Level RRAM-Based Multiplexers. IEEE Trans. Emerg. Top. Comput. 5 (2) (2017)
Mahesh Nataraj, Alexandre Levisse, Bastien Giraud, Jean-Philippe Noël, Pascal Andreas Meinerzhagen, Jean-Michel Portal, Pierre-Emmanuel Gaillardon
Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop. ISCAS (2017)
Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. ACM Great Lakes Symposium on VLSI (2017)
Mathias Soeken, Pierre-Emmanuel Gaillardon, Saeideh Shirinzadeh, Rolf Drechsler, Giovanni De Micheli
A PLiM Computer for the Internet of Things. Computer 50 (6) (2017)
Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Exact Synthesis of Majority-Inverter Graphs and Its Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (11) (2017)
Sebastien Naus, Ioulia Tzouvadaki, Pierre-Emmanuel Gaillardon, Armando Biscontini, Giovanni De Micheli, Sandro Carrara
An efficient electronic measurement interface for memristive biosensors. ISCAS (2017)
Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli
Enabling exact delay synthesis. ICCAD (2017)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2017)
Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Rolf Drechsler
Endurance management for resistive Logic-In-Memory computing architectures. DATE (2017)
Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
Wave pipelining for majority-based beyond-CMOS technologies. DATE (2017)
Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Optimization opportunities in RRAM-based FPGA architectures. LASCAS (2017)
John Reuben, Rotem Ben Hur, Nimrod Wald, Nishil Talati, Ameer Haj Ali, Pierre-Emmanuel Gaillardon, Shahar Kvatinsky
Memristive logic: A framework for evaluation and comparison. PATMOS (2017)
Edouard Giacomin, Jorge Romero Gonzalez, Pierre-Emmanuel Gaillardon
Low-power multiplexer designs using three-independent-gate field effect transistors. NANOARCH (2017)
Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
RM3 based logic synthesis (Special session paper). ISCAS (2017)
Winston Haaswijk, Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A novel basis for logic rewriting. ASP-DAC (2017)
Luca Gaetano Amarù, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Multi-level logic benchmarks: An exactness study. ASP-DAC (2017)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Physical Design Considerations of One-level RRAM-based Routing Multiplexers. ISPD (2017)
Pierre-Emmanuel Gaillardon, Romain Magni, Luca Gaetano Amarù, Mehdi Hasan, Ross Walker, Berardi Sensale Rodriguez, Jean-Frédéric Christmann, Edith Beigné
Three-Independent-Gate Transistors: Opportunities in digital, analog and RF applications. LATS (2016)
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli
The Programmable Logic-in-Memory (PLiM) computer. DATE (2016)
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only). FPGA (2016)
Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Optimizing Majority-Inverter Graphs with functional hashing. DATE (2016)
Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli, Ernesto Sánchez, Matteo Sonza Reorda
A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors. ACM J. Emerg. Technol. Comput. Syst. 13 (2) (2016)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli
A Sound and Complete Axiomatization of Majority-n Logic. IEEE Trans. Computers 65 (9) (2016)
Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Fast logic synthesis for RRAM-based in-memory computing using Majority-Inverter Graphs. DATE (2016)

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Publication Activity (10 Years)

Top Topics

Top Venues

Pierre-Emmanuel Gaillardon