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Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking.
Aurélien Alacchi
Edouard Giacomin
Scott Temple
Roman Gauchi
Michael J. Wirthlin
Pierre-Emmanuel Gaillardon
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2023)
Keyphrases
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low latency
high speed
real time
high bandwidth
high throughput
highly efficient
massive scale
virtual machine
low cost
network topology
continuous query processing
stream processing
hardware implementation
main memory
change detection
power consumption
databases