Edouard Giacomin

Publication Activity (10 Years)

Years Active: 2017-2023
Publications (10 Years): 28

Top Topics

Rapid Prototyping

Schottky Barrier

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

VLSI-SoC (Selected Papers)

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Aurélien Alacchi, Edouard Giacomin, Roman Gauchi, Szymon Kulis, Pierre-Emmanuel Gaillardon
Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures. IEEE Trans. Very Large Scale Integr. Syst. 31 (8) (2023)
Dawit Burusie Abdi, Shairfe Muhammad Salahuddin, Jürgen Bömmels, Edouard Giacomin, Pieter Weckx, Julien Ryckaert, Geert Hellings, Francky Catthoor
3D SRAM Macro Design in 3D Nanofabric Process Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (7) (2023)
Aurélien Alacchi, Edouard Giacomin, Scott Temple, Roman Gauchi, Michael J. Wirthlin, Pierre-Emmanuel Gaillardon
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (5) (2023)
Aurélien Alacchi, Edouard Giacomin, Xifan Tang, Pierre-Emmanuel Gaillardon
Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs. ISCAS (2021)
Matthieu Couriol, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A 12-pA Resolution Sigma Delta ADC Topology for Chemiresistive Sensor-Based Applications. VLSI-SoC (2021)
Edouard Giacomin, Francky Catthoor, Pierre-Emmanuel Gaillardon
Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow. ISCAS (2021)
Matthieu Couriol, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A Novel High-Gain Amplifier Circuit Using Super-Steep-Subthreshold-Slope Field-Effect Transistors. VLSI-SoC (2021)
Matthieu Couriol, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A First Approach in Using Super-Steep-Subthreshold-Slope Field-Effect Transistors in Ultra-Low Power Analog Design. VLSI-SoC (Selected Papers) (2021)
Edouard Giacomin, Jürgen Bömmels, Julien Ryckaert, Francky Catthoor, Pierre-Emmanuel Gaillardon
Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow. VLSI-SOC (2020)
Surya Narayanan, Karl Taht, Rajeev Balasubramonian, Edouard Giacomin, Pierre-Emmanuel Gaillardon
SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks. ISCA (2020)
Xifan Tang, Edouard Giacomin, Baudouin Chauviere, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs. IEEE Micro 40 (4) (2020)
Xifan Tang, Edouard Giacomin, Patsy Cadareanu, Ganesh Gore, Pierre-Emmanuel Gaillardon
A RRAM-based FPGA for Energy-efficient Edge Computing. DATE (2020)
Edouard Giacomin, Jürgen Bömmels, Julien Ryckaert, Francky Catthoor, Pierre-Emmanuel Gaillardon
3D Nanofabric: Layout Challenges and Solutions for Ultra-scaled Logic Designs. VLSI-SoC (Selected Papers) (2020)
Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
Wire-Aware Architecture and Dataflow for CNN Accelerators. MICRO (2019)
Edouard Giacomin, Tzofnat Greenberg-Toledo, Shahar Kvatinsky, Pierre-Emmanuel Gaillardon
A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2019)
Ganesh Gore, Patsy Cadareanu, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. VLSI-SoC (2019)
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories. VLSI-SoC (2019)
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
A Study on Switch Block Patterns for Tileable FPGA Routing Architectures. FPT (2019)
Patsy Cadareanu, Ganesh Gore, Edouard Giacomin, Pierre-Emmanuel Gaillardon
A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. VLSI-SoC (Selected Papers) (2019)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 27 (3) (2019)
Anirban Nag, C. N. Ramachandra, Rajeev Balasubramonian, Ryan Stutsman, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment. MICRO (2019)
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
Accelerating Inference on Binary Neural Networks with Digital RRAM Processing. VLSI-SoC (Selected Papers) (2019)
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Baudouin Chauviere, Pierre-Emmanuel Gaillardon
OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs. FPL (2019)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Post-P&R Performance and Power Analysis for RRAM-Based FPGAs. IEEE J. Emerg. Sel. Topics Circuits Syst. 8 (3) (2018)
Edouard Giacomin, Pierre-Emmanuel Gaillardon
Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect Transistors. VLSI-SoC (2018)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2017)
Edouard Giacomin, Jorge Romero Gonzalez, Pierre-Emmanuel Gaillardon
Low-power multiplexer designs using three-independent-gate field effect transistors. NANOARCH (2017)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Physical Design Considerations of One-level RRAM-based Routing Multiplexers. ISPD (2017)