Shairfe Muhammad Salahuddin

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 4

Top Topics

Write Operations

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Zhenlin Pei, Mahta Mayahinia, Hsiao-Hsuan Liu, Mehdi B. Tahoori, Shairfe Muhammad Salahuddin, Francky Catthoor, Zsolt Tokei, Chenyun Pan
Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access. ISQED (2023)
Dawit Burusie Abdi, Shairfe Muhammad Salahuddin, Jürgen Bömmels, Edouard Giacomin, Pieter Weckx, Julien Ryckaert, Geert Hellings, Francky Catthoor
3D SRAM Macro Design in 3D Nanofabric Process Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (7) (2023)
Alessio Spessot, Shairfe Muhammad Salahuddin, Ricardo Escobar, Romain Ritzenthaler, Yang Xiang, Rahul Budhwani, Eugenio Dentoni Litta, Elena Capogreco, Joao Bastos, Yangyin Chen, Naoto Horiguchi
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations. IMW (2022)
Shairfe Muhammad Salahuddin, Volkan Kursun
Write Assist SRAM Cell with Asymmetrical Bitline Access Transistors for Enhanced Data Stability and Write Ability. J. Circuits Syst. Comput. 25 (1) (2016)
Shairfe Muhammad Salahuddin, Volkan Kursun
High-speed and low-leakage FinFET SRAM cell with enhanced read and write voltage margins. ISIC (2014)
Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
Low-leakage hybrid FinFET SRAM cell with asymmetrical gate overlap / underlap bitline access transistors for enhanced read data stability. ISCAS (2013)
Shairfe Muhammad Salahuddin, Hailong Jiao, Volkan Kursun
A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability. ISQED (2013)
Shairfe Muhammad Salahuddin, Volkan Kursun
Underlap engineered eight-transistor SRAM cell for stronger data stability enhanced write ability and suppressed leakage power consumption. ICECS (2013)