Jürgen Bömmels

Publication Activity (10 Years)

Years Active: 2014-2023
Publications (10 Years): 8

Top Topics

Silicon Dioxide

Gate Dielectrics

Design Considerations

Top Venues

Microelectron. Reliab.

VLSI Technology and Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Victor Vega-Gonzalez, D. Radisic, Bt Chan, S. Choudhury, S. Wang, A. Mingardi, Q. Toan Le, H. Decoster, Y. Oniki, P. Puttarame, Kevin Vandersmissen, J. P. Soulie, A. Peter, A. Sepulveda, D. Batuk, G. T. Martinez, Olivier Richard, Jürgen Bömmels, S. Biesemans, E. Dentoni Litta, Naoto Horiguchi, S. Park, Zsolt Tokei
Integration of a Stacked Contact MOL for Monolithic CFET. VLSI Technology and Circuits (2023)
Hans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Y. Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans
Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning. VLSI Technology and Circuits (2023)
Dawit Burusie Abdi, Shairfe Muhammad Salahuddin, Jürgen Bömmels, Edouard Giacomin, Pieter Weckx, Julien Ryckaert, Geert Hellings, Francky Catthoor
3D SRAM Macro Design in 3D Nanofabric Process Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (7) (2023)
Edouard Giacomin, Jürgen Bömmels, Julien Ryckaert, Francky Catthoor, Pierre-Emmanuel Gaillardon
Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow. VLSI-SOC (2020)
Edouard Giacomin, Jürgen Bömmels, Julien Ryckaert, Francky Catthoor, Pierre-Emmanuel Gaillardon
3D Nanofabric: Layout Challenges and Solutions for Ultra-scaled Logic Designs. VLSI-SoC (Selected Papers) (2020)
Luka Kljucar, Mario Gonzalez, Kristof Croes, Ingrid De Wolf, Joke De Messemaeker, Gayle Murdoch, Philip Nolmans, Joeri De Vos, Jürgen Bömmels, Eric Beyne, Zsolt Tokei
Impact of via density and passivation thickness on the mechanical integrity of advanced Back-End-Of-Line interconnects. Microelectron. Reliab. 79 (2017)
Luka Kljucar, Mario Gonzalez, Ingrid De Wolf, Kristof Croes, Jürgen Bömmels, Zsolt Tokei
Evaluation of via density and low-k Young's modulus influence on mechanical performance of advanced node multi-level Back-End-Of-Line. Microelectron. Reliab. 56 (2016)
Houman Zahedmanesh, Mario Gonzalez, Ivan Ciofi, Kristof Croes, Jürgen Bömmels, Zsolt Tokei
Design considerations for the mechanical integrity of airgaps in nano-interconnects under chip-package interaction; a numerical investigation. Microelectron. Reliab. 59 (2016)
Baojun Tang, Kris Croes, Nicolas Jourdan, Jürgen Bömmels, Zsolt Tokei, Ingrid De Wolf, Eric Wilcox, Timothy McMullen
Constant voltage electromigration for advanced BEOL copper interconnects. IRPS (2015)
Kris Croes, Alicja Lesniewska, Chen Wu, Ivan Ciofi, Agnieszka Banczerowska, B. Briggs, S. Demuynck, Zsolt Tokei, Jürgen Bömmels, Y. Saad, W. Gao
Intrinsic reliability of local interconnects for N7 and beyond. IRPS (2015)
Kris Croes, Deniz Kocaay, Ivan Ciofi, Jürgen Bömmels, Zsolt Tokei
Impact of process variability on BEOL TDDB lifetime model assessment. IRPS (2015)
Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, M. Dusa, Arindam Mallik, Sushil Sakhare, B. Vandewalle, Piet Wambacq, Bharani Chava, Kris Croes, Morin Dehan, Doyoung Jang, P. Leray, T.-T. Liu, Kenichi Miyaguchi, Bertrand Parvais, P. Schuddinck, P. Weemaes, Abdelkarim Mercha, Jürgen Bömmels, N. Horiguchi, G. McIntyre, Aaron Thean, Zsolt Tokei, S. Cheng, Diederik Verkest, A. Steegen
Design Technology co-optimization for N10. CICC (2014)
Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC (2014)
Baojun Tang, Kris Croes, Y. Barbarin, Y. Q. Wang, Robin Degraeve, Y. Li, Maria Toledano-Luque, Thomas Kauerauf, Jürgen Bömmels, Zsolt Tokei, Ingrid De Wolf
As-grown donor-like traps in low-k dielectrics and their impact on intrinsic TDDB reliability. Microelectron. Reliab. 54 (9-10) (2014)