Hans Mertens

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 13

Top Topics

Semiconductor Devices

Gate Dielectrics

Experimental Comparison

Top Venues

VLSI Technology and Circuits

Publications

Hans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Y. Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans
Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning. VLSI Technology and Circuits (2023)
Michiel Vandemaele, Ben Kaczer, Erik Bury, Jacopo Franco, Adrian Chasin, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken
Investigating Nanowire, Nanosheet and Forksheet FET Hot-Carrier Reliability via TCAD Simulations: Invited Paper. IRPS (2023)
Erik Bury, Michiel Vandemaele, Jacopo Franco, Adrian Chasin, Stanislav Tyaginov, A. Vandooren, Romain Ritzenthaler, Hans Mertens, Javier Diaz-Fortuny, N. Horiguchi, Dimitri Linten, Ben Kaczer
Reliability challenges in Forksheet Devices: (Invited Paper). IRPS (2023)
Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Erik Bury, Adrian Chasin, Jacopo Franco, Alexander Makarov, Hans Mertens, Geert Hellings, Guido Groeseneken
Simulation Comparison of Hot-Carrier Degradation in Nanowire, Nanosheet and Forksheet FETs. IRPS (2022)
Erik Bury, Adrian Chasin, Ben Kaczer, Michiel Vandemaele, Stanislav Tyaginov, Jacopo Franco, Romain Ritzenthaler, Hans Mertens, Pieter Weckx, N. Horiguchi, Dimitri Linten
Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets. IRPS (2022)
Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Jacopo Franco, Robin Degraeve, Adrian Chasin, Zhicheng Wu, Erik Bury, Yang Xiang, Hans Mertens, Guido Groeseneken
The properties, effect and extraction of localized defect profiles from degraded FET characteristics. IRPS (2021)
Michiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Zlatan Stanojevic, Alexander Makarov, Adrian Chasin, Erik Bury, Hans Mertens, Dimitri Linten, Guido Groeseneken
) Bias Space Modeling of Hot-Carrier Degradation in Nanowire FETs. IRPS (2019)
Eddy Simoen, Alberto Vinicius Oliveira, Anabela Veloso, Adrian Vaisman Chasin, Romain Ritzenthaler, Hans Mertens, Naoto Horiguchi, Cor Claeys
Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors. ASICON (2019)
Shih-Hung Chen, Dimitri Linten, Geert Hellings, Marco Simicic, Ben Kaczer, Thomas Chiarella, Hans Mertens, Jérôme Mitard, Anda Mocuta, N. Horiguchi
CDM-Time Domain Turn-on Transient of ESD Diodes in Bulk FinFET and GAA NW Technologies. IRPS (2019)
Romain Ritzenthaler, Hans Mertens, A. De Keersgieter, Jérôme Mitard, Dan Mocuta, N. Horiguchi
Isolation of nanowires made on bulk wafers by ground plane doping. ESSDERC (2017)
Mustafa Badaroglu, Jeff Xu, John Zhu, Da Yang, Jerry Bao, Seung-Chul Song, Peijie Feng, Romain Ritzenthaler, Hans Mertens, Geert Eneman, Naoto Horiguchi, Jeffrey Smith, Suman Datta, David Kohen, Po-Wen Chan, Keagan Chen, P. R. Chidi Chidambaram
PPAC scaling enablement for 5nm mobile SoC technology. ESSDERC (2017)
Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer
Lateral NWFET optimization for beyond 7nm nodes. ICICDT (2015)
Jacopo Franco, Ben Kaczer, Philippe J. Roussel, Erik Bury, Hans Mertens, Romain Ritzenthaler, Tibor Grasser, Naoto Horiguchi, Aaron Thean, Guido Groeseneken
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures. IRPS (2015)