Romain Ritzenthaler

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 12

Top Topics

Homography Estimation

Experimental Comparison

Top Venues

VLSI Technology and Circuits

Publications

Jacopo Franco, Hiroaki Arimura, J.-F. de Marneffe, S. Brus, Romain Ritzenthaler, E. Dentoni Litta, Kris Croes, Ben Kaczer, N. Horiguchi
Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions. VLSI Technology and Circuits (2023)
Erik Bury, Michiel Vandemaele, Jacopo Franco, Adrian Chasin, Stanislav Tyaginov, A. Vandooren, Romain Ritzenthaler, Hans Mertens, Javier Diaz-Fortuny, N. Horiguchi, Dimitri Linten, Ben Kaczer
Reliability challenges in Forksheet Devices: (Invited Paper). IRPS (2023)
Alessio Spessot, Shairfe Muhammad Salahuddin, Ricardo Escobar, Romain Ritzenthaler, Yang Xiang, Rahul Budhwani, Eugenio Dentoni Litta, Elena Capogreco, Joao Bastos, Yangyin Chen, Naoto Horiguchi
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations. IMW (2022)
Erik Bury, Adrian Chasin, Ben Kaczer, Michiel Vandemaele, Stanislav Tyaginov, Jacopo Franco, Romain Ritzenthaler, Hans Mertens, Pieter Weckx, N. Horiguchi, Dimitri Linten
Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets. IRPS (2022)
J. P. Bastos, Barry J. O'Sullivan, Jacopo Franco, Stanislav Tyaginov, Brecht Truijen, Adrian Chasin, Robin Degraeve, Ben Kaczer, Romain Ritzenthaler, E. Capogreco, E. Dentoni Litta, Alessio Spessot, Yusuke Higashi, Y. Yoon, V. Machkaoutsan, Pierre Fazan, N. Horiguchi
Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery. IRPS (2022)
Romain Ritzenthaler, E. Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits (2022)
Adrian Chasin, Jacopo Franco, Erik Bury, Romain Ritzenthaler, Eugenio Dentoni Litta, Alessio Spessot, Naoto Horiguchi, Dimitri Linten, Ben Kaczer
Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation. IRPS (2020)
Eddy Simoen, Alberto Vinicius Oliveira, Anabela Veloso, Adrian Vaisman Chasin, Romain Ritzenthaler, Hans Mertens, Naoto Horiguchi, Cor Claeys
Impact of Device Architecture and Gate Stack Processing on the Low-Frequency Noise of Silicon Nanowire Transistors. ASICON (2019)
Barry J. O'Sullivan, Romain Ritzenthaler, Gerhard Rzepa, Z. Wu, E. Dentoni Litta, O. Richard, T. Conard, V. Machkaoutsan, Pierre Fazan, C. Kim, Jacopo Franco, Ben Kaczer, Tibor Grasser, Alessio Spessot, Dimitri Linten, N. Horiguchi
Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices. IRPS (2019)
Romain Ritzenthaler, Hans Mertens, A. De Keersgieter, Jérôme Mitard, Dan Mocuta, N. Horiguchi
Isolation of nanowires made on bulk wafers by ground plane doping. ESSDERC (2017)
Mustafa Badaroglu, Jeff Xu, John Zhu, Da Yang, Jerry Bao, Seung-Chul Song, Peijie Feng, Romain Ritzenthaler, Hans Mertens, Geert Eneman, Naoto Horiguchi, Jeffrey Smith, Suman Datta, David Kohen, Po-Wen Chan, Keagan Chen, P. R. Chidi Chidambaram
PPAC scaling enablement for 5nm mobile SoC technology. ESSDERC (2017)
Thomas Chiarella, S. Kubicek, E. Rosseel, Romain Ritzenthaler, Andriy Hikavyy, P. Eyben, A. De Keersgieter, L.-Å. Ragnarsson, M.-S. Kim, S.-A. Chew, Tom Schram, S. Demuynck, Miroslav Cupák, Luc Rijnders, Morin Dehan, Naoto Horiguchi, Jérôme Mitard, Dan Mocuta, Anda Mocuta, Aaron Voon-Yew Thean
Towards high performance sub-10nm finW bulk FinFET technology. ESSDERC (2016)
Romain Ritzenthaler, Tom Schram, M. J. Cho, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Christian Caillat, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son
I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration. ICICDT (2015)
Alessio Spessot, Romain Ritzenthaler, Tom Schram, Marc Aoulaiche, Moonju Cho, Maria Toledano-Luque, Naoto Horiguchi, Pierre Fazan
Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs. ICICDT (2015)
Jacopo Franco, Ben Kaczer, Philippe J. Roussel, Erik Bury, Hans Mertens, Romain Ritzenthaler, Tibor Grasser, Naoto Horiguchi, Aaron Thean, Guido Groeseneken
NBTI in Si0.55Ge0.45 cladding p-FinFETs: Porting the superior reliability from planar to 3D architectures. IRPS (2015)
Romain Ritzenthaler, Tom Schram, Geert Eneman, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son
Assessment of SiGe quantum well transistors for DRAM peripheral applications. ICICDT (2015)
Moonju Cho, Alessio Spessot, Ben Kaczer, Marc Aoulaiche, Romain Ritzenthaler, Tom Schram, Pierre Fazan, Naoto Horiguchi, Dimitri Linten
Off-state stress degradation mechanism on advanced p-MOSFETs. ICICDT (2015)
Alessio Spessot, Marc Aoulaiche, Moonju Cho, Jacopo Franco, Tom Schram, Romain Ritzenthaler, Ben Kaczer
Impact of Off State Stress on advanced high-K metal gate NMOSFETs. ESSDERC (2014)
Doyoung Jang, Marie Garcia Bardon, Dmitry Yakimets, Kenichi Miyaguchi, An De Keersgieter, Thomas Chiarella, Romain Ritzenthaler, Morin Dehan, Abdelkarim Mercha
STI and eSiGe source/drain epitaxy induced stress modeling in 28 nm technology with replacement gate (RMG) process. ESSDERC (2013)
Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken, Naoto Horiguchi, Aaron Thean, Antonio Federico, Felice Crupi, Alessio Spessot, Christian Caillat, Pierre Fazan, H.-J. Na, Y. Son, K. B. Noh
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC (2013)
Romain Ritzenthaler, Tom Schram, Erik Bury, Jérôme Mitard, L.-Å. Ragnarsson, Guido Groeseneken, N. Horiguchi, Aaron Thean, Alessio Spessot, Christian Caillat, V. Srividya, Pierre Fazan
Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks. ESSDERC (2012)