Javier Diaz-Fortuny

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 23

Top Topics

Monocular Vision

Integrated Circuit

Design Considerations

Top Venues

IEEE Trans. Instrum. Meas.

Publications

Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Alex Romano-Molar, Erik Bury, Robin Degraeve, Ben Kaczer
Demonstration of Chip Overclock Detection by Employing Tamper-Aware Odometer Technology. IRPS (2024)
Hussam Amrouch, Victor M. van Santen, Javier Diaz-Fortuny, Florian Klemme
Machine Learning Unleashes Aging and Self-Heating Effects: From Transistors to Full Processor (Invited Paper). IRPS (2024)
Pablo Saraza-Canflanca, Dishant Sangani, Javier Diaz-Fortuny, Stanislav Tyaginov, Georges G. E. Gielen, Erik Bury, Ben Kaczer
Statistical Characterization of Off-State Stress Degradation in Planar HKMG nFETs Using Device Arrays. IRPS (2024)
Javier Martín-Martínez, Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Montserrat Nafría
Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variability. IRPS (2023)
D. Sangani, Javier Diaz-Fortuny, Erik Bury, Ben Kaczer, Georges G. E. Gielen
The Role of Mobility Degradation in the BTI-Induced RO Aging in a 28-nm Bulk CMOS Technology: (Student paper). IRPS (2023)
Javier Diaz-Fortuny, Dishant Sangani, Pablo Saraza-Canflanca, Erik Bury, Robin Degraeve, Ben Kaczer
Improving the Tamper-Aware Odometer Concept by Enhancing Dynamic Stress Operation. IRPS (2023)
Erik Bury, Michiel Vandemaele, Jacopo Franco, Adrian Chasin, Stanislav Tyaginov, A. Vandooren, Romain Ritzenthaler, Hans Mertens, Javier Diaz-Fortuny, N. Horiguchi, Dimitri Linten, Ben Kaczer
Reliability challenges in Forksheet Devices: (Invited Paper). IRPS (2023)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Andrea Vici, Erik Bury, Robin Degraeve, Ben Kaczer
Using dedicated device arrays for the characterization of TDDB in a scaled HK/MG technology. IRPS (2023)
Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Erik Bury, Michiel Vandemaele, Ben Kaczer, Robin Degraeve
A Ring-Oscillator-Based Degradation Monitor Concept with Tamper Detection Capability. IRPS (2022)
Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Andrés Santana-Andreo, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
A Smart SRAM-Cell Array for the Experimental Study of Variability Phenomena in CMOS Technologies. IRPS (2022)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level. Integr. 72 (2020)
Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría
Flexible Setup for the Measurement of CMOS Time-Dependent Variability With Array-Based Integrated Circuits. IEEE Trans. Instrum. Meas. 69 (3) (2020)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Xavier Aragonès, Enrique Barajas, Diego Mateo, Francisco V. Fernández, Montserrat Nafría
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI. IEEE J. Solid State Circuits 54 (2) (2019)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca Moreno, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors. DATE (2019)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level. SMACD (2019)
G. Pedreira, Javier Martín-Martínez, Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Montserrat Nafría
A New Time Efficient Methodology for the Massive Characterization of RTN in CMOS Devices. IRPS (2019)
Victor M. van Santen, Javier Diaz-Fortuny, Hussam Amrouch, Javier Martín-Martínez, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Jörg Henkel, Montserrat Nafría
Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability. IRPS (2018)
Pablo Saraza-Canflanca, D. Malagon, Fábio Passos, A. Toro, Juan Núñez, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Design Considerations of an SRAM Array for the Statistical Validation of Time-Dependent Variability Models. SMACD (2018)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
CMOS Characterization and Compact Modelling for Circuit Reliability Simulation. IOLTS (2018)
Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Antonio Toro-Frías, Rafael Castro-López, Javier Martín-Martínez, Elisenda Roca, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría
A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation. SMACD (2018)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Automated Massive RTN Characterization Using a Transistor Array Chip. SMACD (2018)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Enrique Barajas, Xavier Aragonès, Diego Mateo
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. SMACD (2017)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
TARS: A toolbox for statistical reliability modeling of CMOS devices. SMACD (2017)