Rafael Castro-López

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 63

Top Topics

Optimization Method

Implementation Issues

Analog Circuits

Top Venues

Publications

Jose M. Gata-Romero, Elisenda Roca, Juan Núñez, Rafael Castro-López, Francisco V. Fernández
Reliability evaluation of IC Ring Oscillator PUFs. SMACD (2023)
Javier Martín-Martínez, Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Montserrat Nafría
Challenges and solutions to the defect-centric modeling and circuit simulation of time-dependent variability. IRPS (2023)
Victor M. van Santen, Jose M. Gata-Romero, Juan Núñez, Rafael Castro-López, Elisenda Roca, Hussam Amrouch
Characterizing BTI and HCD in 1.2V 65nm CMOS Oscillators made from Combinational Standard Cells and Processor Logic Paths. IRPS (2023)
Andrés Santana-Andreo, Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test array. SMACD (2023)
Jose M. Gata-Romero, Andrés Santana-Andreo, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
A Test Module for Aging Characterization of Digital Circuits. SMACD (2023)
Francisco V. Fernández, Elisenda Roca, Pablo Saraza-Canflanca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López
Strategies for parameter extraction of the time constant distribution of time-dependent variability models for nanometer-scale devices. SMACD (2023)
F. J. Rubio-Barbero, Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF. SMACD (2023)
Eros Camacho-Ruiz, F. J. Rubio-Barbero, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Design considerations for a CMOS 65-nm RTN-based PUF. SMACD (2023)
Pablo Saraza-Canflanca, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
On the Impact of the Biasing History on the Characterization of Random Telegraph Noise. IEEE Trans. Instrum. Meas. 71 (2022)
Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
High-level design of a novel PUF based on RTN. SMACD (2022)
Andrés Santana-Andreo, Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Piedad Brox, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs. Integr. 85 (2022)
Pablo Saraza-Canflanca, Javier Martín-Martínez, Elisenda Roca, Rafael Castro-López, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
A systematic approach to RTN parameter fitting based on the Maximum Current Fluctuation. SMACD (2022)
Andrés Santana-Andreo, Pablo Martín-Lloret, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
Characterization and analysis of BTI and HCI effects in CMOS current mirrors. SMACD (2022)
Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Piedad Brox, F. V. Fernandez
A novel Physical Unclonable Function using RTN. ISCAS (2022)
Andrés Santana-Andreo, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
Impact of BTI and HCI on the reliability of a Majority Voter. SMACD (2022)
Fábio Passos, Nuno C. Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Machine Learning Approaches for Transformer Modeling. SMACD (2022)
Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Andrés Santana-Andreo, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
A Smart SRAM-Cell Array for the Experimental Study of Variability Phenomena in CMOS Technologies. IRPS (2022)
Eros Camacho-Ruiz, Andrés Santana-Andreo, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
On the use of an RTN simulator to explore the quality trade-offs of a novel RTN-based PUF. SMACD (2022)
António Canelas, Fábio Passos, Nuno Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs. IEEE Access 9 (2021)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level. Integr. 72 (2020)
Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría
Flexible Setup for the Measurement of CMOS Time-Dependent Variability With Array-Based Integrated Circuits. IEEE Trans. Instrum. Meas. 69 (3) (2020)
Pablo Saraza-Canflanca, H. Carrasco-Lopez, Piedad Brox, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Improving the reliability of SRAM-based PUFs in the presence of aging. DTIS (2020)
Fábio Passos, Elisenda Roca, Ricardo Martins, Nuno Lourenço, Saiyd Ahyoune, Javier J. Sieiro, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology. IEEE Access 8 (2020)
Fábio Passos, Elisenda Roca, Javier J. Sieiro, Rafaella Fiorelli, Rafael Castro-López, José María López-Villegas, Francisco V. Fernández
A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (3) (2020)
Fábio Passos, Miguel Chanca, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
Synthesis of mm-Wave Wideband Receivers in 28-nm CMOS Technology for Automotive Radar Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. SMACD (2019)
Fábio Passos, Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits. Soft Comput. 23 (13) (2019)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Xavier Aragonès, Enrique Barajas, Diego Mateo, Francisco V. Fernández, Montserrat Nafría
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI. IEEE J. Solid State Circuits 54 (2) (2019)
Juan Núñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Experimental Characterization of Time-Dependent Variability in Ring Oscillators. SMACD (2019)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca Moreno, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors. DATE (2019)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level. SMACD (2019)
Ricardo Martins, Nuno Lourenço, Fábio Passos, Ricardo Povoa, António Canelas, Elisenda Roca, Rafael Castro-López, Javier J. Sieiro, Francisco V. Fernández, Nuno Horta
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (6) (2019)
Pablo Martín-Lloret, Juan Núñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks. SMACD (2019)
G. Pedreira, Javier Martín-Martínez, Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Montserrat Nafría
A New Time Efficient Methodology for the Massive Characterization of RTN in CMOS Devices. IRPS (2019)
Antonio Toro-Frías, Pablo Saraza-Canflanca, Fábio Passos, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator. DATE (2019)
Victor M. van Santen, Javier Diaz-Fortuny, Hussam Amrouch, Javier Martín-Martínez, Rosana Rodríguez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Jörg Henkel, Montserrat Nafría
Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability. IRPS (2018)
Pablo Saraza-Canflanca, D. Malagon, Fábio Passos, A. Toro, Juan Núñez, Javier Diaz-Fortuny, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Design Considerations of an SRAM Array for the Statistical Validation of Time-Dependent Variability Models. SMACD (2018)
Enrique Barajas, Xavier Aragonès, Diego Mateo, Francesc Moll, Antonio Rubio, Javier Martín-Martínez, Rosana Rodríguez, Marc Porti, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Analysis of Body Bias and RTN-Induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology. PATMOS (2018)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
CMOS Characterization and Compact Modelling for Circuit Reliability Simulation. IOLTS (2018)
Fábio Passos, Ricardo Martins, Nuno C. Lourenço, Elisenda Roca, Rafael Castro-López, Ricardo Povoa, António Canelas, Nuno Horta, Francisco V. Fernández
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. SMACD (2018)
Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs. SMACD (2018)
Fábio Passos, Ricardo Martins, Nuno Lourenço, Elisenda Roca, Ricardo Povoa, António Canelas, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integr. 63 (2018)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design. IEEE Trans. Very Large Scale Integr. Syst. 26 (11) (2018)
Javier Diaz-Fortuny, Pablo Saraza-Canflanca, Antonio Toro-Frías, Rafael Castro-López, Javier Martín-Martínez, Elisenda Roca, Rosana Rodríguez, Francisco V. Fernández, Montserrat Nafría
A Model Parameter Extraction Methodology Including Time-Dependent Variability for Circuit Reliability Simulation. SMACD (2018)
Pablo Saraza-Canflanca, Javier Diaz-Fortuny, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Automated Massive RTN Characterization Using a Transistor Array Chip. SMACD (2018)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
An inductor modeling and optimization toolbox for RF circuit design. Integr. 58 (2017)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno C. G. Horta
Systematic design of a voltage controlled oscillator using a layout-aware approach. SMACD (2017)
Nuno C. Lourenço, Ricardo Martins, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. SMACD (2017)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective. CEC (2017)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Enrique Barajas, Xavier Aragonès, Diego Mateo
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. SMACD (2017)
Pablo Martín-Lloret, Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría
CASE: A reliability simulation tool for analog ICs. SMACD (2017)
Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. SMACD (2017)
Javier Diaz-Fortuny, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
TARS: A toolbox for statistical reliability modeling of CMOS devices. SMACD (2017)
Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Javier J. Sieiro, José María López-Villegas, Neus Vidal
An Automated Design Methodology of RF Circuits by Using Pareto-Optimal Fronts of EM-Simulated Inductors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (1) (2017)
Antonio Toro-Frías, Pablo Martín-Lloret, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría
Including a stochastic model of aging in a reliability simulation flow. SMACD (2017)
Pablo Martín-Lloret, Antonio Toro-Frías, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs. ISCAS (2017)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling. Appl. Soft Comput. 60 (2017)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
SIDe-O: A toolbox for surrogate inductor design and optimization. SMACD (2016)
Fábio Passos, Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
Accurate synthesis of integrated RF passive components using surrogate models. DATE (2016)
Manuel Velasco-Jimenez, Rafael Castro-López, José M. de la Rosa
Live demonstration: High-level optimization of ΣΔ modulators using multi-objetive evolutionary algorithms. ISCAS (2016)
Antonio Toro-Frías, Pablo Martín-Lloret, Javier Martín-Martínez, Rafael Castro-López, Elisenda Roca, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández
Reliability simulation for analog ICs: Goals, solutions, and challenges. Integr. 55 (2016)
Manuel Velasco-Jimenez, Rafael Castro-López, José M. de la Rosa
High-level optimization of ΣΔ modulators using multi-objetive evolutionary algorithms. ISCAS (2016)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Y. Ye, Domenico Spina, Tom Dhaene
Frequency-dependent parameterized macromodeling of integrated inductors. SMACD (2016)
Fábio Passos, Mouna Kotti, Reinier Gonzalez-Echevarria, M. Helena Fino, Mourad Fakhfakh, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
Physical vs. surrogate models of passive RF devices. ISCAS (2015)
Manuel Velasco-Jimenez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Design space exploration using hierarchical composition of performance models. ISCAS (2015)
Manuel Velasco-Jimenez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Implementation issues in the hierarchical composition of performance models of analog circuits. DATE (2014)
Reinier Gonzalez-Echevarria, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier J. Sieiro, Neus Vidal, José María López-Villegas
Automated Generation of the Optimal Performance Trade-Offs of Integrated Inductors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (8) (2014)
Antonio Toro-Frías, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Layout-aware Pareto fronts of electronic circuits. ECCTD (2011)
Francisco V. Fernández, Juan Esteban-Muller, Elisenda Roca, Rafael Castro-López
Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors. IEEE Congress on Evolutionary Computation (2010)
Alonso Morgado, Rocío del Río Fernández, José M. de la Rosa, Rafael Castro-López, Maria Belen Pérez-Verdú
A 0.13 µm CMOS adaptive sigma-delta modulator for triple-mode GSM/Bluetooth/UMTS applications. Microelectron. J. 41 (5) (2010)
Bo Liu, Francisco V. Fernández, Georges G. E. Gielen, Rafael Castro-López, Elisenda Roca
A memetic approach to the automatic design of high-performance analog integrated circuits. ACM Trans. Design Autom. Electr. Syst. 14 (3) (2009)
Rafael Castro-López, Delia Rodríguez de Llera, Mohammed Ismail, Francisco V. Fernández
AMS/RF-CMOS circuit design for wireless transceivers. Integr. 42 (1) (2009)
Elisenda Roca, Mourad Fakhfakh, Rafael Castro-López, Francisco V. Fernández
Applications of evolutionary computation techniques to analog, mixed-signal and RF circuit design - an overview. ICECS (2009)
Elisenda Roca, Rafael Castro-López, Francisco V. Fernández
Hierarchical synthesis based on pareto-optimal fronts. ECCTD (2009)
Helmut Gräb, Florin Balasa, Rafael Castro-López, Yu-Wei Chang, Francisco V. Fernández, Mark Po-Hung Lin, Martin Strasser
Analog layout synthesis - Recent advances in topological approaches. DATE (2009)
José M. de la Rosa, Rafael Castro-López, Alonso Morgado, Edwin C. Becerra-Alvarez, Rocío del Río, Francisco V. Fernández, Maria Belen Pérez-Verdú
Adaptive CMOS analog circuits for 4G mobile terminals - Review and state-of-the-art survey. Microelectron. J. 40 (1) (2009)
Alonso Morgado, V. J. Rivas, Rocío del Río, Rafael Castro-López, Francisco V. Fernández, José M. de la Rosa
Behavioral modeling, simulation and synthesis of multi-standard wireless receivers in MATLAB/SIMULINK. Integr. 41 (2) (2008)
Rafael Castro-López, Oscar Guerra, Elisenda Roca, Francisco V. Fernández
An Integrated Layout-Synthesis Approach for Analog ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (7) (2008)
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Juan Francisco Fernández-Bootello, Davide Brandano, Rafael Castro-López, José M. de la Rosa
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems. APCCAS (2006)
Rafael Castro-López, Francisco V. Fernández, Fernando Medeiro, Ángel Rodríguez-Vázquez
Accurate VHDL-based simulation of Sigma-Delta modulators. ISCAS (4) (2003)
Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez, Rafael Castro-López, Servando Espejo-Meana
A 1000FPS@128×128 vision processor with 8-bit digitized I/O. ESSCIRC (2003)
Rafael Castro-López, Francisco V. Fernández, Fernando Medeiro, Ángel Rodríguez-Vázquez
Behavioural Modelling and Simulation of SigmaDelta Modulators Using Hardware Description Languages. DATE (2003)
Rafael Castro-López, José M. de la Rosa, R. Romay, Rocío del Río, Fernando Medeiro, Francisco V. Fernández
Description Languages and Tools for the Behavioural Simulation of SD Modulators: a Comparative Survey. FDL (2003)
Rafael Castro-López, Francisco V. Fernández, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
Retargeting of mixed-signal blocks for SoCs. DATE (2001)
José E. Franca, Nuno Horta, M. Pereira, João C. Vital, Rafael Castro-López, Manuel Delgado-Restituto, Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. Ramos, P. Santos
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design. ICECS (1999)