João C. Vital

Publication Activity (10 Years)

Years Active: 1993-2006
Publications (10 Years): 0

Publications

Pedro M. Figueiredo, Paulo Cardoso, Ana Lopes, Carlos Fachada, Naoyuki Hamanishi, Ken Tanabe, João C. Vital
A 90nm CMOS 1.2v 6b 1GS/s two-step subranging ADC. ISSCC (2006)
Pedro M. Figueiredo, João C. Vital
Kickback noise reduction techniques for CMOS latched comparators. IEEE Trans. Circuits Syst. II Express Briefs (7) (2006)
Pedro M. Figueiredo, João C. Vital
Termination of averaging networks in flash ADCs. ISCAS (1) (2004)
Pedro M. Figueiredo, João C. Vital
The MOS capacitor amplifier. IEEE Trans. Circuits Syst. II Express Briefs (3) (2004)
Pedro M. Figueiredo, João C. Vital
Low kickback noise techniques for CMOS latched comparators. ISCAS (1) (2004)
Pedro M. Figueiredo, João C. Vital
Averaging technique in flash analog-to-digital converters. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2004)
Pedro M. Figueiredo, João C. Vital
Analysis of the averaging technique in flash ADCs. ISCAS (1) (2003)
Jorge Guilherme, João C. Vital, José E. Franca
A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB. ICECS (2002)
Xu Jingnan, João C. Vital, Nuno Horta
A Skill-based library for retargetable embedded analog cores. DATE (2001)
Xu Jingnan, J. Serras, M. Oliveira, R. Belo, M. Bugalho, João C. Vital, Nuno Horta, José E. Franca
IC design automation from circuit level optimization to retargetable layout. ICECS (2001)
Jorge Guilherme, João C. Vital, José E. Franca
A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction. ICECS (2001)
Jorge Guilherme, Pedro M. Figueiredo, Pedro Azevedo, Goncalo Minderico, Antonio Leal, João C. Vital, José E. Franca
A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications. ISCAS (1) (2001)
Jorge Guilherme, Pedro M. Figueiredo, P. Azevedo, G. Minderico, A. Leal, João C. Vital, José E. Franca
Design considerations for high resolution pipeline ADCs in digital CMOS technology. ICECS (2001)
José E. Franca, Nuno Horta, M. Pereira, João C. Vital, Rafael Castro-López, Manuel Delgado-Restituto, Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. Ramos, P. Santos
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design. ICECS (1999)
João Goes, João C. Vital, José E. Franca
Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration. ISCAS (1995)
João C. Vital, José E. Franca
A Concurrent Two-step Flash Analogue-to-digital Converter Architecture. ISCAS (1993)
João C. Vital, José E. Franca
High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities. VLSI Design (1993)
João C. Vital, José E. Franca, Nuno S. Silva
Fully-digital Testability of a High-speed Conversion System. ISCAS (1993)