Nuno Horta

ORCID

Publication Activity (10 Years)

Years Active: 1999-2024
Publications (10 Years): 74

Top Venues

Publications

Gustavo Liñán Cembrano, Nuno Lourenço, Nuno Horta, José M. de la Rosa
Design Automation of Analog and Mixed-Signal Circuits Using Neural Networks - A Tutorial Brief. IEEE Trans. Circuits Syst. II Express Briefs 71 (3) (2024)
Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço
Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG Signals. SMACD (2023)
André Amaral, António Gusmão, Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço
An ANN-Based Approach to the Modelling and Simulation of Analogue Circuits. SMACD (2023)
Rafael Vieira, Fábio Passos, Ricardo Martins, Nuno Horta, Nuno Lourenço
Behavioral Analysis of Noise and Bandwidth Specifications of Heartbeat Detection Circuits for Ultra Low Power Devices. IEEE Access 11 (2023)
Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta
A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology. SMACD (2023)
Pedro Alves, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
ANN-based Analog IC Floorplan Recommender with a Broader Topological Constraints Coverage. SMACD (2022)
Pedro Vaz, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
Speeding-Up Complex RF IC Sizing Optimizations with a Process, Voltage and Temperature Corner Performance Estimator based on ANNs. ISCAS (2022)
João Domingues, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
Accelerating Voltage-Controlled Oscillator Sizing Optimizations with ANN-based Convergence Classifiers and Frequency Guess Predictors. SMACD (2022)
Yannik Zeiträg, José Rui Figueira, Nuno Horta, Rui Neves
Surrogate-assisted automatic evolving of dispatching rules for multi-objective dynamic job shop scheduling using genetic programming. Expert Syst. Appl. 209 (2022)
Fábio Passos, Rafael Vieira, António Canelas, Ricardo Póvoa, Nuno Lourenço, Nuno Horta, Jorge Guilherme
A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications. ISCAS (2022)
Fábio Passos, Nuno C. Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Machine Learning Approaches for Transformer Modeling. SMACD (2022)
António Gusmão, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins
DeepPlacer: A custom integrated OpAmp placement tool using deep models. Appl. Soft Comput. 115 (2022)
Nuno Lourenço, Fábio Passos, Rafael Vieira, Ricardo Martins, Nuno Horta, Jorge Guilherme, Ricardo Póvoa
Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient. SMACD (2022)
Rafáel Vieira, Fábio Passos, Ricardo Povoa, Ricardo Martins, Nuno Horta, Jorge Guilherme, Nuno Lourenço
Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. SMACD (2022)
Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta
Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing. Eng. Appl. Artif. Intell. 98 (2021)
António Canelas, Fábio Passos, Nuno Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs. IEEE Access 9 (2021)
António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
Late Breaking Results: Attention in Graph2Seq Neural Networks towards Push-Button Analog IC Placement. DAC (2021)
António Gusmão, Fábio Passos, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins
Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender. ISCAS (2020)
Ricardo Póvoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes
A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications. IEEE Trans. Circuits Syst. II Express Briefs (2) (2020)
Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins
Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools. IEEE Trans. Circuits Syst. (11) (2020)
António Canelas, Ricardo Póvoa, Ricardo Martins, Nuno Lourenço, Jorge Guilherme, João Paulo Carvalho, Nuno Horta
-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (1) (2020)
Ricardo Póvoa, Richa Arya, António Canelas, Fábio Passos, Ricardo Martins, Nuno Lourenço, Nuno Horta
Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications. Microelectron. J. 95 (2020)
Fábio Passos, Elisenda Roca, Ricardo Martins, Nuno Lourenço, Saiyd Ahyoune, Javier J. Sieiro, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology. IEEE Access 8 (2020)
Simão Moraes Sarmento, Nuno Horta
Enhancing a Pairs Trading strategy with the application of Machine Learning. Expert Syst. Appl. 158 (2020)
Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes
A new family of CMOS inverter-based OTAs for biomedical and healthcare applications. Integr. 71 (2020)
Fábio Passos, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. SMACD (2019)
Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Póvoa, Nuno Horta, Emmanuel Moutaye
Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization. SMACD (2019)
Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications. IEEE Trans. Very Large Scale Integr. Syst. 27 (1) (2019)
Nuno Lourenço, Engin Afacan, Ricardo Martins, Fábio Passos, António Canelas, Ricardo Póvoa, Nuno Horta, Günhan Dündar
Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing. SMACD (2019)
Ricardo Martins, Nuno Lourenço, Fábio Passos, Ricardo Povoa, António Canelas, Elisenda Roca, Rafael Castro-López, Javier J. Sieiro, Francisco V. Fernández, Nuno Horta
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (6) (2019)
Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta
On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects. SMACD (2019)
Daniel Guerra, António Canelas, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins
Artificial Neural Networks as an Alternative for Automatic Analog IC Placement. SMACD (2019)
Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes
A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers. SMACD (2019)
Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm. SMACD (2019)
Daniela Moniz, João Pedro, Nuno Horta, João Pires
Multi-objective framework for cost-effective OTN switch placement using NSGA-II with embedded domain knowledge. Appl. Soft Comput. 83 (2019)
António Canelas, Ricardo Povoa, Ricardo M. F. Martins, Nuno Lourenço, Jorge Guilherme, Nuno Horta
A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications. SMACD (2018)
João Baúto, António Canelas, Rui Ferreira Neves, Nuno Horta
Parallel SAX/GA for financial pattern matching using NVIDIA's GPU. Expert Syst. Appl. 105 (2018)
Bernardo Jubert de Almeida, Rui Ferreira Neves, Nuno Horta
Combining Support Vector Machine with Genetic Algorithms to optimize investments in Forex markets with high leverage. Appl. Soft Comput. 64 (2018)
Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications. SMACD (2018)
Jigme Zangpo, Ricardo Povoa, Jorge Guilherme, Nuno Horta
An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations. ICECS (2018)
Gonçalo Abreu, Rui Ferreira Neves, Nuno Horta
Currency exchange prediction using machine learning, genetic algorithms and technical analysis. CoRR (2018)
Nuno Lourenço, Joao Rosa, Ricardo Martins, Helena Aidos, António Canelas, Ricardo Povoa, Nuno Horta
On the Exploration of Promising Analog IC Designs via Artificial Neural Networks. SMACD (2018)
João Carapuço, Rui Ferreira Neves, Nuno Horta
Reinforcement learning applied to Forex trading. Appl. Soft Comput. 73 (2018)
Fábio Passos, Ricardo Martins, Nuno C. Lourenço, Elisenda Roca, Rafael Castro-López, Ricardo Povoa, António Canelas, Nuno Horta, Francisco V. Fernández
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. SMACD (2018)
Jonathan Calvillo, Ricardo Póvoa, Jorge Guilherme, Nuno Horta
Second-order compensation BGR with low TC and high performance for space applications. Integr. 63 (2018)
Fábio Passos, Ricardo Martins, Nuno Lourenço, Elisenda Roca, Ricardo Povoa, António Canelas, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integr. 63 (2018)
Sérgio Sabino, Nuno Horta, António Grilo
Centralized Unmanned Aerial Vehicle Mesh Network Placement Scheme: A Multi-Objective Evolutionary Algorithm Approach. Sensors 18 (12) (2018)
Tiago Pessoa, Nuno Lourenço, Ricardo Martins, Ricardo Povoa, Nuno Horta
Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel. DATE (2018)
Ricardo Povoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes
Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving. IEEE Trans. Circuits Syst. II Express Briefs (11) (2018)
Rodrigo Granja, Mauro Santos, Jorge Guilherme, Nuno Horta
11.7b Time-To-Digital Converter with 0.82ps resolution in 130nm CMOS Technology. PRIME (2018)
Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017. Integr. 63 (2018)
Carlos Simoes, Rui Ferreira Neves, Nuno Horta
Using sentiment from Twitter optimized by Genetic Algorithms to predict the stock market. CEC (2017)
Mariana Daniel, Rui Ferreira Neves, Nuno Horta
Company event popularity for financial markets using Twitter and sentiment analysis. Expert Syst. Appl. 71 (2017)
Nuno C. Lourenço, Ricardo Martins, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. SMACD (2017)
António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta
Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing. DATE (2017)
Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. SMACD (2017)
Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
Stochastic-based placement template generator for analog IC layout-aware synthesis. Integr. 58 (2017)
Nuno Horta, Andrea Baschirotto, Francisco V. Fernández, Günhan Dündar, João Goes, Jorge Fernandes
Introduction to the special issue on PRIME 2016 and SMACD 2016. Integr. 58 (2017)
Jonathan Calvillo, Jorge Guilherme, Nuno Horta
Design of a BGR Suitable for the Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C. NGCAS (2017)
Jose Cachaco, Nuno Machado, Nuno Lourenço, Jorge Guilherme, Nuno Horta
Automatic technology migration of analog IC designs using generic cell libraries. DATE (2017)
Ricardo Povoa, Ivan Bastos, Nuno Lourenço, Nuno Horta
Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques. Integr. 52 (2016)
Nuno Neves, Rui Neves, Nuno Horta, Pedro Tomás, Nuno Roma
Multi-objective kernel mapping and scheduling for morphable many-core architectures. Expert Syst. Appl. 45 (2016)
Danial Yazdani, Alireza Sepas-Moghaddam, Atabak Dehban, Nuno Horta
A Novel Approach for Optimization in Dynamic Environments Based on Modified Artificial Fish Swarm Algorithm. Int. J. Comput. Intell. Appl. 15 (2) (2016)
Carlos Silva, Jorge Guilherme, Nuno Horta
SCALES: A high speed simulator tool for pipeline A/D converters. SMACD (2016)
António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta
Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations. SMACD (2016)
Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Povoa, Nuno Horta
AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation. Integr. 55 (2016)
Mauro Santos, Nuno Horta, Jorge Guilherme
Logarithmic AD Converter With Selectable Transfer Characteristic. IEEE Trans. Circuits Syst. II Express Briefs (3) (2016)
João Leitão, Rui Ferreira Neves, Nuno Horta
Combining rules between PIPs and SAX to identify patterns in financial markets. Expert Syst. Appl. 65 (2016)
Günhan Dündar, Nuno Horta, Francisco V. Fernández
Introduction to the special issue on SMACD 2015. Integr. 55 (2016)
Ricardo Martins, António Canelas, Nuno Lourenço, Nuno Horta
On-the-fly exploration of placement templates for analog IC layout-aware sizing methodologies. SMACD (2016)
Andre Ferreira, Nuno Lourenço, Ricardo Martins, Nuno Horta
Automated analog IC design constraints generation for a layout-aware sizing approach. SMACD (2016)
David Neves, Ricardo Martins, Nuno Lourenço, Nuno Horta
Design automation tasks scheduling for enhanced parallel execution of a state-of-the-art layout-aware sizing approach. DATE (2016)
Mrinalinee Pandey, António Canelas, Ricardo Póvoa, Jorge Alves Torres, João Costa Freire, Nuno Lourenço, Nuno Horta
Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer. Integr. 55 (2016)
Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta
Current-flow and current-density-aware multi-objective optimization of analog IC placement. Integr. 55 (2016)
António Silva, Rui Ferreira Neves, Nuno Horta
A hybrid approach to portfolio composition based on fundamental and technical indicators. Expert Syst. Appl. 42 (4) (2015)
José Matias Pinto, Rui Ferreira Neves, Nuno Horta
Boosting Trading Strategies performance using VIX indicator together with a dual-objective Evolutionary Computation optimizer. Expert Syst. Appl. 42 (19) (2015)
Nuno Lourenço, Ricardo Martins, Nuno Horta
Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction. DATE (2015)
Naércio Magaia, Nuno Horta, Rui Ferreira Neves, Paulo Rogério Pereira, Miguel Correia
A multi-objective routing algorithm for Wireless Multimedia Sensor Networks. Appl. Soft Comput. 30 (2015)
Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
Extraction and application of wiring symmetry rules to route analog multiport terminals. ISCAS (2015)
Jaime Machado, Rui Ferreira Neves, Nuno Horta
Developing Multi-Time Frame Trading Rules with a Trend Following Strategy, using GA. GECCO (Companion) (2015)
Ricardo Martins, Nuno Lourenço, Nuno Horta
Multi-objective optimization of analog integrated circuit placement hierarchy in absolute coordinates. Expert Syst. Appl. 42 (23) (2015)
David Guilherme, João Pereira, Nuno Horta, Jorge Guilherme
Thermal-aware floorplanning and layout generation of MOSFET power stages. ISCAS (2015)
Ricardo Povoa, Nuno Lourenço, Nuno Horta, João Goes
A voltage-combiners-biased amplifier with enhanced gain and speed using current starving. ISCAS (2015)
Nuno Lourenço, António Canelas, Ricardo Povoa, Ricardo Martins, Nuno Horta
Floorplan-aware analog IC sizing and optimization based on topological constraints. Integr. 48 (2015)
Ricardo Povoa, Ricardo Lourenco, Nuno Lourenço, António Canelas, Ricardo Martins, Nuno Horta
LC-VCO automatic synthesis using multi-objective evolutionary techniques. ISCAS (2014)
António Silva, Rui Ferreira Neves, Nuno Horta
Portfolio optimization using fundamental indicators based on multi-objective EA. CIFEr (2014)
Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
Electromigration-aware analog Router with multilayer multiport terminal structures. Integr. 47 (4) (2014)
Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes
A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. ICECS (2014)
José Matias Pinto, Rui Ferreira Neves, Nuno Horta
Multi-objective Optimization of Investment Strategies - Based on Evolutionary Computation Techniques, in Volatile Environments. ICEIS (1) (2014)
Bruno Silva, Nuno Horta, Jorge Guilherme
A rad-hard DC-DC converter controller. ICECS (2014)
Mauro Santos, Nuno Horta, Jorge Guilherme
Logarithmic AD conversion using latched comparators and a time-to-digital converter. ICECS (2014)
Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
Electromigration-aware and IR-Drop avoidance routing in analog multiport terminal structures. DATE (2014)
David Guilherme, Nuno Horta, Jorge Guilherme
Automatic layout generation of power MOSFET transistors in bulk CMOS. ICECS (2014)
Mauro Santos, Nuno Horta, Jorge Guilherme
A survey on nonlinear analog-to-digital converters. Integr. 47 (1) (2014)
Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
Multi-port multi-terminal analog router based on an evolutionary optimization kernel. IEEE Congress on Evolutionary Computation (2013)
Frederico Rocha, Nuno Lourenço, Ricardo Povoa, Ricardo Martins, Nuno Horta
A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis. IEEE Congress on Evolutionary Computation (2013)
Jorge Fonseca, Rui Ferreira Neves, Nuno Horta
Optimizing investment strategies based on companies earnings using genetic algorithms. GECCO (Companion) (2013)
Ricardo Martins, Nuno Lourenço, Nuno Horta
LAYGEN II - Automatic Layout Generation of Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (11) (2013)
Frederico Rocha, Ricardo Martins, Nuno Lourenço, Nuno Horta
Enhancing a Layout-Aware Synthesis Methodology for Analog ICs by Embedding Statistical Knowledge into the Evolutionary Optimization Kernel. DoCEIS (2013)
António Canelas, Rui Ferreira Neves, Nuno Horta
Multi-dimensional pattern discovery in financial time series using sax-ga with extended robustness. GECCO (Companion) (2013)

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Publication Activity (10 Years)

Top Topics

Top Venues

Nuno Horta