Gianluca Giustolisi

Publication Activity (10 Years)

Years Active: 1998-2024
Publications (10 Years): 21

Top Topics

Multiple Stages

Design Methodology

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Minoo Eghtesadi, Gianluca Giustolisi, Salvatore Pennisi, Egidio Ragonese
A 28-nm CMOS 60-GHz LNA for OOK Low-Power Receivers. PRIME (2024)
Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo, Giuseppe Scotti
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers. IEEE Access 10 (2022)
Francesco Centurelli, Gianluca Giustolisi, Salvatore Pennisi, Giuseppe Scotti
A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs. IEEE Access 10 (2022)
Angelo Lucio Bella, Gianluca Giustolisi, Manuela La Rosa, Giovanni Sicurella
Design Methodology of the Output Power Stage of a Step-Down DC-DC Converter. PRIME (2022)
Gianluca Giustolisi, Gaetano Palumbo
Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-Adders. IEEE Access 10 (2022)
Gianluca Giustolisi, Gaetano Palumbo
Design of CMOS three-stage amplifiers for near-to-minimum settling-time. Microelectron. J. 107 (2021)
Gianluca Giustolisi, Gaetano Palumbo
Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (3) (2021)
Gianluca Giustolisi, Gaetano Palumbo
Design of Three-Stage OTAs from Settling-Time and Slew-Rate Constraints. ISCAS (2021)
Gianluca Giustolisi, Gaetano Palumbo
In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2019)
Andrea Ballo, Alfio Dario Grasso, Gianluca Giustolisi, Gaetano Palumbo
Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area. IEEE Trans. Circuits Syst. II Express Briefs (12) (2019)
Gianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies. Microelectron. J. 92 (2019)
Andrea Ballo, Gianluca Giustolisi, Alfio Dario Grasso, Gaetano Palumbo
A Clock Boosted Charge Pump with Reduced Rise Time. ICECS (2018)
Gianluca Giustolisi, Gaetano Palumbo
Bessel-like compensation of three-stage operational transconductance amplifiers. Int. J. Circuit Theory Appl. 46 (4) (2018)
Gianluca Giustolisi, Gaetano Palumbo
Design of CMOS OTAs with Settling-Time Constraints. ICECS (2018)
Gianluca Giustolisi, Gaetano Palumbo
Settling-time oriented OTA design through the approximation of the ideal delay. ISCAS (2018)
Gianluca Giustolisi, Gaetano Palumbo
Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads. ISCAS (2018)
Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017. Integr. 63 (2018)
Gianluca Giustolisi, Gaetano Palumbo
Robust design of CMOS amplifiers oriented to settling-time specification. Int. J. Circuit Theory Appl. 45 (10) (2017)
Gianluca Giustolisi, Gaetano Palumbo, Paolo Finocchiaro, Alfio Pappalardo
Verilog-a modeling of Silicon Photo-Multipliers. ISCAS (2016)
Gianluca Giustolisi, Gaetano Palumbo
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2015)
Gianluca Giustolisi, Alfio Dario Grasso, Gaetano Palumbo
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes. IEEE Trans. Instrum. Meas. 64 (1) (2015)
Gianluca Giustolisi, Alfio Dario Grasso, Gaetano Palumbo
Monolithic quenching-and-reset circuit for single-photon avalanche diodes. ICECS (2014)
Gianluca Giustolisi, Gaetano Palumbo, Paolo Finocchiaro, Alfio Pappalardo
A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers. ECCTD (2013)
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
Logic gates dynamic modeling by means of an ultra-compact MOS model. ISCAS (2012)
Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo
Behavioral modeling of statistical phenomena of single-photon avalanche diodes. Int. J. Circuit Theory Appl. 40 (7) (2012)
Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2012)
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
An Accurate Ultra-Compact I-V Model for Nanometer MOS Transistors With Applications on Digital Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2012)
Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo
Verilog-A modeling of SPAD statistical phenomena. ISCAS (2011)
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
An ultra-compact MOS model in nanometer technologies. ECCTD (2011)
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model. ECCTD (2011)
Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale
Low-voltage LDO Compensation Strategy based on Current Amplifiers. ISCAS (2008)
David Cristaldi, Gianluca Giustolisi
Modeling of EMI propagation in switched-capacitor ΣΔ A/D converter. ICECS (2008)
Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale
LDO compensation strategy based on current buffer/amplifiers. ECCTD (2007)
Christian Falconi, Arnaldo D'Amico, Gianluca Giustolisi, Gaetano Palumbo
Rosenstark-like Representation of Feedback Amplifier Resistance. ISCAS (2007)
Gianluca Giustolisi
Two-Stage OTA Design Based on Settling-Time Constraints. ISCAS (2007)
Arnaldo D'Amico, Christian Falconi, Gianluca Giustolisi, Gaetano Palumbo
Resistance of Feedback Amplifiers: A Novel Representation. IEEE Trans. Circuits Syst. II Express Briefs (4) (2007)
Gianluca Giustolisi, Alfio Dario Grasso, Salvatore Pennisi
High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier. IEEE Trans. Circuits Syst. II Express Briefs (2) (2007)
Gianluca Giustolisi, Gaetano Palumbo, Christian Falconi, Arnaldo D'Amico
NMOS Low Drop-Out Regulator with Dynamic Biasing. ICECS (2006)
Christian Falconi, Gianluca Giustolisi
Analysis of power supply gain of CMOS bandgap references. ISCAS (2006)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
Design and Comparison of Very Low-Voltage CMOS Output Stages. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2005)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
Analysis and optimization of a low-voltage class-AB output stage. ICECS (2005)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
Guidelines for designing class-AB output stages. ECCTD (2005)
Gianluca Giustolisi, Gaetano Palumbo, Maurizio Gaibotti, Michelangelo Pisasale
Statistical analysis of CMOS current reference. ECCTD (2005)
Gianluca Giustolisi, Gaetano Palumbo
Comparison of methods for predicting distortion in class-AB stages. ICECS (2005)
Gianluca Giustolisi, Gaetano Palumbo
Sigma-Delta A/D fuzzy converter. ISCAS (4) (2004)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
Exploiting the high-frequency performance of low-voltage low-power SC filters. IEEE Trans. Circuits Syst. II Express Briefs (2) (2004)
Gianluca Giustolisi, Alessandro Rizzo
CMOS implementation of an extended CNN cell to deal with complex dynamics. ISCAS (5) (2003)
Gianluca Giustolisi, Gaetano Palumbo, M. Criscione, F. Cutri
A low-voltage low-power voltage reference based on subthreshold MOSFETs. IEEE J. Solid State Circuits 38 (1) (2003)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
Design of low-voltage low-power SC filters for high-frequency applications. ISCAS (1) (2003)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
A 1-V CMOS output stage with high linearity. ISCAS (1) (2003)
Gianluca Giustolisi, Gaetano Palumbo
A new method for evaluating harmonic distortion in push-pull output stages. ISCAS (1) (2003)
Gianluca Giustolisi, Gaetano Palumbo
A novel 1-V class-AB transconductor for improving speed performance in SC applications. ISCAS (1) (2003)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
Analysis, modelling and optimization of a gain boosted telescopic amplifier. Int. J. Circuit Theory Appl. 31 (5) (2003)
Gianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi
Statistical analysis of the resolution in a current-mode ADC. ICECS (2002)
Gianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi
Current-mode A/D fuzzy converter. IEEE Trans. Fuzzy Syst. 10 (4) (2002)
Gianluca Giustolisi, Gaetano Palumbo
Analysis of power supply noise attenuation in a PTAT current source. ISCAS (1) (2002)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
Analysis and optimization of gain-boosted telescopic amplifiers. ISCAS (1) (2002)
Gianluca Giustolisi, Gaetano Palumbo
Detailed frequency analysis of power supply rejection in Brokaw bandgap. ISCAS (1) (2001)
M. Criscione, Gianluca Giustolisi, A. Lionetto, M. Muscarà, Gaetano Palumbo
A fuzzy controller for step-up DC/DC converters. ICECS (2001)
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
Analysis and optimization of a novel CMOS multiplier. Int. J. Circuit Theory Appl. 29 (3) (2001)
Gianluca Giustolisi, Giuseppe Palmisano, T. Segreto
1.2-V CMOS op-amp with a dynamically biased output stage. IEEE J. Solid State Circuits 35 (4) (2000)
Gianluca Giustolisi, Giuseppe Palmisano, Salvatore Pennisi
High-linear class AB transconductor for high-frequency applications. ISCAS (2000)
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
A fuzzy membership function circuit in SC technique. ISCAS (2000)
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
CMRR frequency response of CMOS operational transconductance amplifiers. IEEE Trans. Instrum. Meas. 49 (1) (2000)
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
A 1.5 V CMOS voltage multiplier. ICECS (1998)
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo, C. Strano
A Novel 1.5-V Cmos Mixer. Great Lakes Symposium on VLSI (1998)