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Design and Comparison of Very Low-Voltage CMOS Output Stages.

Walter AloisiGianluca GiustolisiGaetano Palumbo
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2005)
Keyphrases
  • low voltage
  • cmos technology
  • design considerations
  • low power
  • high speed
  • single chip
  • random access memory
  • power line
  • real time
  • design process
  • circuit design
  • mixed signal