A 1.5 V CMOS voltage multiplier.
Gianluca GiustolisiGiuseppe PalmisanoGaetano PalumboPublished in: ICECS (1998)
Keyphrases
- low voltage
- power supply
- design considerations
- high speed
- circuit design
- power consumption
- floating point
- random access memory
- power system
- analog vlsi
- high voltage
- intelligent control
- low cost
- cmos technology
- power quality
- type ii
- hardware implementation
- transmission line
- delay insensitive
- low power
- interior point methods
- image sensor
- vlsi circuits
- charge coupled device