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Design considerations for high resolution pipeline ADCs in digital CMOS technology.
Jorge Guilherme
Pedro M. Figueiredo
P. Azevedo
G. Minderico
A. Leal
João C. Vital
José E. Franca
Published in:
ICECS (2001)
Keyphrases
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design considerations
low voltage
high resolution
cmos technology
mixed signal
low power
random access memory
spl times
power consumption
super resolution
multi channel
image processing
high quality
cmos image sensor
power dissipation
pedagogical agents
high speed