Jesús Ruiz-Amaya

Publication Activity (10 Years)

Years Active: 2004-2015
Publications (10 Years): 1

Top Topics

Data Compression

Signal Noise Ratio

Top Venues

IEEE Trans. Biomed. Circuits Syst.

Int. J. Circuit Theory Appl.

Publications

Jesús Ruiz-Amaya, Alberto Rodríguez-Pérez, Manuel Delgado-Restituto
A Low Noise Amplifier for Neural Spike Recording Interfaces. Sensors 15 (10) (2015)
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
Behavioral modeling of pipeline ADC building blocks. Int. J. Circuit Theory Appl. 40 (6) (2012)
Alberto Rodríguez-Pérez, Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
A Low-Power Programmable Neural Spike Detection Channel With Embedded Calibration and Data Compression. IEEE Trans. Biomed. Circuits Syst. 6 (2) (2012)
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2011)
Alberto Rodríguez-Pérez, Jesús Ruiz-Amaya, Jose Antonio Rodríguez-Rodríguez, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
A power efficient neural spike recording channel with data bandwidth reduction. ISCAS (2011)
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2009)
Alberto Rodríguez-Pérez, Manuel Delgado-Restituto, Jesús Ruiz-Amaya, Fernando Medeiro
An ultra-low power consumption 1-V, 10-bit succesive approximation ADC. ICECS (2008)
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
Electrical-level synthesis of pipeline ADCs. APCCAS (2008)
Jesús Ruiz-Amaya, Juan Francisco Fernández-Bootello, Manuel Delgado-Restituto
Design procedure for optimizing the power consumption of two-stage Miller compensated amplifiers in SC circuits. ECCTD (2007)
Davide Brandano, Manuel Delgado-Restituto, Jesús Ruiz-Amaya, Ángel Rodríguez-Vázquez
A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology. ECCTD (2007)
Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Juan Francisco Fernández-Bootello, Davide Brandano, Rafael Castro-López, José M. de la Rosa
A 12-bit CMOS Current Steering D/A Converter for Embedded Systems. APCCAS (2006)
Jesús Ruiz-Amaya, José M. de la Rosa, Francisco V. Fernández, Fernando Medeiro, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2005)
Manuel Delgado-Restituto, Jesús Ruiz-Amaya, José M. de la Rosa, Juan Francisco Fernández-Bootello, Leila Díez, Rocío del Río Fernández, Ángel Rodríguez-Vázquez
An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technology. ISCAS (5) (2005)
Jesús Ruiz-Amaya, José M. de la Rosa, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
Behavioral modeling simulation and high-level synthesis of pipeline A/D converters. ISCAS (6) (2005)
Jesús Ruiz-Amaya, Josep Lluís de la Rosa, Fernando Medeiro, Francisco V. Fernández, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators. DATE (2004)
Jesús Ruiz-Amaya, José M. de la Rosa, Fernando Medeiro, Francisco V. Fernández, Rocío del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez
An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment. ISCAS (5) (2004)