Layout-aware Pareto fronts of electronic circuits.
Antonio Toro-FríasRafael Castro-LópezElisenda RocaFrancisco V. FernándezPublished in: ECCTD (2011)
Keyphrases
- electronic circuits
- pareto fronts
- multi objective
- test problems
- multi objective problems
- project scheduling
- parallel processing
- nsga ii
- graduate school
- particle swarm optimization
- multi objective optimization
- knapsack problem
- genetic algorithm
- neural network
- multiple objectives
- multi criteria
- differential evolution
- evolutionary algorithm
- lower bound
- computational complexity