A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUF.
F. J. Rubio-BarberoEros Camacho-RuizRafael Castro-LópezElisenda RocaFrancisco V. FernándezPublished in: SMACD (2023)
Keyphrases
- cmos technology
- power reduction
- high speed
- circuit design
- low power
- power consumption
- silicon on insulator
- analog vlsi
- metal oxide semiconductor
- low voltage
- automatic detection
- nm technology
- detection algorithm
- delay insensitive
- vlsi circuits
- similarity measure
- electronic devices
- detection method
- low cost
- distance measure
- neural network
- analog circuits
- asynchronous circuits
- evaluation measures
- chip design