B. T. Chan

Publication Activity (10 Years)

Years Active: 2021-2023
Publications (10 Years): 7

Top Topics

Metal Oxide Semiconductor

Semiconductor Devices

Gate Dielectrics

Top Venues

VLSI Technology and Circuits

Publications

S. Yang, Pieter Schuddinck, Marie Garcia Bardon, Yang Xiang, Anabela Veloso, B. T. Chan, Gioele Mirabelli, Gaspard Hiblot, Geert Hellings, Julien Ryckaert
PPA and Scaling Potential of Backside Power Options in N2 and A14 Nanosheet Technology. VLSI Technology and Circuits (2023)
Hans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Y. Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans
Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt Patterning. VLSI Technology and Circuits (2023)
Hiroaki Arimura, S. Brus, Jacopo Franco, Y. Oniki, A. Vandooren, T. Conard, B. T. Chan, B. Kannan, M. Samiee, W. Li, P. Deminskyi, E. Shero, J. Bakke, N. Jourdan, G. Alessio Verni, J. W. Maes, M. Givens, Lars-Åke Ragnarsson, Jérôme Mitard, E. Dentoni Litta, N. Horiguchi
Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET. VLSI Technology and Circuits (2023)
Anabela Veloso, A. Jourdain, D. Radisic, R. Chen, G. Arutchelvan, B. O'Sullivan, Hiroaki Arimura, Michele Stucchi, An De Keersgieter, M. Hosseini, T. Hopf, K. D'Have, S. Wang, E. Dupuy, G. Mannaert, Kevin Vandersmissen, S. Iacovo, P. Marien, S. Choudhury, F. Schleicher, F. Sebaai, Y. Oniki, X. Zhou, A. Gupta, Tom Schram, B. Briggs, C. Lorant, E. Rosseel, Andriy Hikavyy, Roger Loo, J. Geypen, D. Batuk, G. T. Martinez, J. P. Soulie, Katia Devriendt, B. T. Chan, S. Demuynck, Gaspard Hiblot, Geert Van der Plas, Julien Ryckaert, Gerald Beyer, E. Dentoni Litta, Eric Beyne, Naoto Horiguchi
Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails. VLSI Technology and Circuits (2022)
Romain Ritzenthaler, E. Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits (2022)
Iuliana P. Radu, R. Li, Anton Potocnik, T. Ivanov, D. Wan, S. Kubicek, N. I. Dumoulin Stuyck, J. Verjauw, J. Jussot, Y. Canvel, C. Godfrin, M. Mongillo, Rohith Acharya, Asser Elsayed, M. Shehata, X. Piao, A. Pacco, L. Souriau, S. Couet, B. T. Chan, Jan Craninckx, Bertrand Parvais, A. Grill, S. Narasimhamoorthy, Steven Van Winckel, Steven Brebels, Fahd A. Mohiyaddin, G. Simion, Bogdan Govoreanu
Solid state qubits: how learning from CMOS fabrication can speed-up progress in Quantum Computing. VLSI Circuits (2021)
N. I. Dumoulin Stuyck, R. Li, C. Godfrin, Asser Elsayed, S. Kubicek, J. Jussot, B. T. Chan, Fahd A. Mohiyaddin, M. Shehata, G. Simion, Y. Canvel, L. Goux, M. Heyns, Bogdan Govoreanu, I. P. Radu
Uniform Spin Qubit Devices with Tunable Coupling in an All-Silicon 300 mm Integrated Process. VLSI Circuits (2021)