Alessio Spessot

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 19

Top Topics

Electronic Devices

Top Venues

Publications

J. P. Bastos, Barry J. O'Sullivan, Yusuke Higashi, Adrian Vaisman Chasin, Jacopo Franco, Hiroaki Arimura, J. Ganguly, Elena Capogreco, Alessio Spessot, N. Horiguchi
Side and Corner Region Non-Uniformities in Grown SiO2 and Their Implications on Current, Capacitance and Breakdown Characteristics. IRPS (2024)
Ji-Yung Lin, Pieter Weckx, Subrat Mishra, Alessio Spessot, Francky Catthoor
Multitimescale Mitigation for Performance Variability Improvement in Time-Critical Systems. IEEE Trans. Very Large Scale Integr. Syst. 30 (11) (2022)
Alessio Spessot, Shairfe Muhammad Salahuddin, Ricardo Escobar, Romain Ritzenthaler, Yang Xiang, Rahul Budhwani, Eugenio Dentoni Litta, Elena Capogreco, Joao Bastos, Yangyin Chen, Naoto Horiguchi
Thermally stable, packaged aware LV HKMG platforms benchmark to enable low power I/O for next 3D NAND generations. IMW (2022)
J. P. Bastos, Barry J. O'Sullivan, Jacopo Franco, Stanislav Tyaginov, Brecht Truijen, Adrian Chasin, Robin Degraeve, Ben Kaczer, Romain Ritzenthaler, E. Capogreco, E. Dentoni Litta, Alessio Spessot, Yusuke Higashi, Y. Yoon, V. Machkaoutsan, Pierre Fazan, N. Horiguchi
Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery. IRPS (2022)
Romain Ritzenthaler, E. Capogreco, E. Dupuy, Hiroaki Arimura, J. P. Bastos, P. Favia, F. Sebaai, D. Radisic, V. T. H. Nguyen, G. Mannaert, B. T. Chan, V. Machkaoutsan, Y. Yoon, H. Itokawa, M. Yamaguchi, Y. Chen, Pierre Fazan, S. Subramanian, Alessio Spessot, E. Dentoni Litta, S. Samavedam, Naoto Horiguchi
High Performance Thermally Resistant FinFETs DRAM Peripheral CMOS FinFETs with VTH Tunability for Future Memories. VLSI Technology and Circuits (2022)
Ji-Yung Lin, Pieter Weckx, Subrat Mishra, Alessio Spessot, Francky Catthoor
Proactive Run-Time Mitigation for Time-Critical Applications Using Dynamic Scenario Methodology. DATE (2022)
Subrat Mishra, Pieter Weckx, Odysseas Zografos, Ji-Yung Lin, Alessio Spessot, Francky Catthoor
Overhead Reduction with Optimal Margining Using A Reliability Aware Design Paradigm. IRPS (2021)
Adrian Chasin, Jacopo Franco, Erik Bury, Romain Ritzenthaler, Eugenio Dentoni Litta, Alessio Spessot, Naoto Horiguchi, Dimitri Linten, Ben Kaczer
Relevance of fin dimensions and high-pressure anneals on hot-carrier degradation. IRPS (2020)
Subrat Mishra, Pieter Weckx, Ji-Yung Lin, Ben Kaczer, Dimitri Linten, Alessio Spessot, Francky Catthoor
Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS). IRPS (2020)
Alessio Spessot, Bertrand Parvais, Amita Rawat, Kenichi Miyaguchi, Pieter Weckx, Doyoung Jang, Julien Ryckaert
Device Scaling roadmap and its implications for Logic and Analog platform. BCICTS (2020)
Trong Huynh Bao, Anabela Veloso, Sushil Sakhare, Philippe Matagne, Julien Ryckaert, Manu Perumkunnil, Davide Crotti, Farrukh Yasin, Alessio Spessot, Arnaud Furnémont, Gouri Sankar Kar, Anda Mocuta
Process, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications. DAC (2019)
Barry J. O'Sullivan, Romain Ritzenthaler, Gerhard Rzepa, Z. Wu, E. Dentoni Litta, O. Richard, T. Conard, V. Machkaoutsan, Pierre Fazan, C. Kim, Jacopo Franco, Ben Kaczer, Tibor Grasser, Alessio Spessot, Dimitri Linten, N. Horiguchi
Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices. IRPS (2019)
Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Alessio Spessot, Diederik Verkest, Anda Mocuta
SRAM designs for 5nm node and beyond: Opportunities and challenges. ICICDT (2017)
Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. ESSDERC (2017)
Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. ICICDT (2017)
Romain Ritzenthaler, Tom Schram, M. J. Cho, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Christian Caillat, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son
I/O thick oxide device integration using Diffusion and Gate Replacement (D&GR) gate stack integration. ICICDT (2015)
Alessio Spessot, Romain Ritzenthaler, Tom Schram, Marc Aoulaiche, Moonju Cho, Maria Toledano-Luque, Naoto Horiguchi, Pierre Fazan
Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs. ICICDT (2015)
Romain Ritzenthaler, Tom Schram, Geert Eneman, Anda Mocuta, Naoto Horiguchi, Aaron Voon-Yew Thean, Alessio Spessot, Marc Aoulaiche, Pierre Fazan, K. B. Noh, Y. Son
Assessment of SiGe quantum well transistors for DRAM peripheral applications. ICICDT (2015)
Moonju Cho, Alessio Spessot, Ben Kaczer, Marc Aoulaiche, Romain Ritzenthaler, Tom Schram, Pierre Fazan, Naoto Horiguchi, Dimitri Linten
Off-state stress degradation mechanism on advanced p-MOSFETs. ICICDT (2015)
Alessio Spessot, Marc Aoulaiche, Moonju Cho, Jacopo Franco, Tom Schram, Romain Ritzenthaler, Ben Kaczer
Impact of Off State Stress on advanced high-K metal gate NMOSFETs. ESSDERC (2014)
Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken, Naoto Horiguchi, Aaron Thean, Antonio Federico, Felice Crupi, Alessio Spessot, Christian Caillat, Pierre Fazan, H.-J. Na, Y. Son, K. B. Noh
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC (2013)
Romain Ritzenthaler, Tom Schram, Erik Bury, Jérôme Mitard, L.-Å. Ragnarsson, Guido Groeseneken, N. Horiguchi, Aaron Thean, Alessio Spessot, Christian Caillat, V. Srividya, Pierre Fazan
Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks. ESSDERC (2012)