Stefan Cosemans

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 29

Top Topics

Transformation Matrix

Energy Efficient

Top Venues

Publications

Pascal Alexander Hager, Bert Moons, Stefan Cosemans, Ioannis A. Papistas, Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anastasios Psarras, Sander Geursen, Jeroen Vermeeren, Yi Lu, Abhishek Maringanti, Deepak Ameta, Leonidas Katselas, Noah Hütter, Manuel Schmuck, Swetha Sivadas, Karishma Sharma, Manuel Oliveira, Ramon Aerne, Nitish Sharma, Timir Soni, Beatrice Bussolino, Djordje Pesut, Michele Pallaro, Andrei Podlesnii, Alexios Lyrakis, Yannick Ruffiner, Martino Dazzi, Johannes Thiele, Koen Goetschalckx, Nazareno Bruschi, Jonas Doevenspeck, Bram Verhoef, Stefan Linz, Giuseppe Garcea, Jonathan Ferguson, Ioannis Koltsidas, Evangelos Eleftheriou
11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. ISSCC (2024)
Mohit Gupta, Stefan Cosemans, Peter Debacker, Wim Dehaene
A 2Mbit Digital in-Memory Computing Matrix-Vector Multiplier for DNN Inference supporting flexible bit precision and matrix size achieving 612 binary TOPS/W. ESSCIRC (2023)
Subhali Subhechha, Stefan Cosemans, Attilio Belmonte, Nouredine Rassoul, Shamin Houshmand Sharifi, Peter Debacker, Diederik Verkest, Romain Delhougne, Gouri Sankar Kar
Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays. IMW (2023)
Swatilekha Majumdar, Stefan Cosemans, Arindam Mallik, Peter Debacker, Francky Catthoor, Jan Van Houdt
Evaluating the Effects of FeFET Device Variability on Charge Sharing Based AiMC Accelerator. ISCAS (2023)
Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration. ACM Trans. Design Autom. Electr. Syst. 27 (5) (2022)
Hongwu Jiang, Wantong Li, Shanshi Huang, Stefan Cosemans, Francky Catthoor, Shimeng Yu
Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators. IEEE Des. Test 39 (2) (2022)
Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe M. Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian P. Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC (2022)
Michele Caselli, Ioannis A. Papistas, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest
Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing. NEWCAS (2021)
Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. ISCAS (2021)
Sidharth Rao, Woojin Kim, Simon Van Beek, Shreya Kundu, Manu Perumkunnil, Stefan Cosemans, Farrukh Yasin, Sebastien Couet, Robert Carpenter, Barry J. O'Sullivan, Shamin H. Sharifi, N. Jossart, Laurent Souriau, Ludovic Goux, Dimitri Crotti, Gouri Sankar Kar
STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application. IMW (2021)
Ioannis A. Papistas, Stefan Cosemans, Bram Rooseleer, Jonas Doevenspeck, Myung Hee Na, Arindam Mallik, Peter Debacker, Diederik Verkest
in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration. CICC (2021)
Simon Van Beek, Siddharth Rao, Shreya Kundu, Woojin Kim, Barry J. O'Sullivan, Stefan Cosemans, Farrukh Yasin, Robert Carpenter, Sebastien Couet, Shamin H. Sharifi, Nico Jossart, Davide Crotti, Gouri Sankar Kar
Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solution. IRPS (2021)
Daniël Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
eSRAM Reliability: Why is it still not optimally solved? DTIS (2020)
Daniel Kraak, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
Mitigation of Sense Amplifier Degradation Using Skewed Design. DATE (2020)
Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
Hardware-Based Aging Mitigation Scheme for Memory Address Decoder. ETS (2019)
Bram-Ernst Verhoef, Nathan Laubeuf, Stefan Cosemans, Peter Debacker, Ioannis A. Papistas, Arindam Mallik, Diederik Verkest
FQ-Conv: Fully Quantized Convolution for Efficient and Accurate Inference. CoRR (2019)
Daniel Kraak, Mottaqiallah Taouil, Innocent Agbo, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
Parametric and Functional Degradation Analysis of Complete 14-nm FinFET SRAM. IEEE Trans. Very Large Scale Integr. Syst. 27 (6) (2019)
Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
Methodology for Application-Dependent Degradation Analysis of Memory Timing. DATE (2019)
Jonas Doevenspeck, Robin Degraeve, Stefan Cosemans, Philippe Roussel, Bram-Ernst Verhoef, Rudy Lauwereins, Wim Dehaene
Analytic variability study of inference accuracy in RRAM arrays with a binary tree winner-take-all circuit for neuromorphic applications. ESSDERC (2018)
Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
Degradation analysis of high performance 14nm FinFET SRAM. DATE (2018)
Simon Van Beek, Philippe Roussel, Barry J. O'Sullivan, Robin Degraeve, Stefan Cosemans, Dimitri Linten, Gouri Sankar Kar
Study of breakdown in STT-MRAM using ramped voltage stress and all-in-one maximum likelihood fit. ESSDERC (2018)
Innocent Agbo, Mottaqiallah Taouil, Daniel Kraak, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
Impact and mitigation of SRAM read path aging. Microelectron. Reliab. 87 (2018)
Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. ESSDERC (2017)
Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. ICICDT (2017)
Daniel Kraak, Mottaqiallah Taouil, Innocent Agbo, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads. IEEE Trans. Very Large Scale Integr. Syst. 25 (12) (2017)
Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
Mitigation of sense amplifier degradation using input switching. DATE (2017)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor
Comparative BTI analysis for various sense amplifier designs. DDECS (2016)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
Read path degradation analysis in SRAM. ETS (2016)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor, Wim Dehaene
Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability. ISVLSI (2016)
Azam Seyedi, Vasileios Karakostas, Stefan Cosemans, Adrián Cristal, Mario Nemirovsky, Osman S. Unsal
NEMsCAM: A novel CAM cell based on nano-electro-mechanical switch and CMOS for energy efficient TLBs. NANOARCH (2015)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor
BTI analysis of SRAM write driver. IDT (2015)
Raf Appeltans, Stefan Cosemans, Praveen Raghavan, Diederik Verkest, Liesbet Van der Perre, Wim Dehaene
STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance. NVMSA (2015)
Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Stefan Cosemans, Pieter Weckx, Praveen Raghavan, Francky Catthoor
Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier. DTIS (2015)
Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM. DATE (2012)
Bram Rooseleer, Stefan Cosemans, Wim Dehaene
A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, Ultra Low Leakage Power Memory Using Dynamic Cell Stability and a Dual Swing Data Link. IEEE J. Solid State Circuits 47 (7) (2012)
Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
Ultra Low-Energy SRAM Design for Smart Ubiquitous Sensors. IEEE Micro 32 (5) (2012)
Leqi Zhang, Stefan Cosemans, Dirk J. Wouters, Guido Groeseneken, Malgorzata Jurczak
Analysis of the effect of cell parameters on the maximum RRAM array size considering both read and write. ESSDERC (2012)
Anselme Vignon, Stefan Cosemans, Wim Dehaene
A low leakage 500MHz 2T embedded dynamic memory with integrated semi-transparent refresh. ESSCIRC (2011)
Bram Rooseleer, Stefan Cosemans, Wim Dehaene
A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link. ESSCIRC (2011)
Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
A 4.4 pJ/Access 80 MHz, 128 kbit Variability Resilient SRAM With Multi-Sized Sense Amplifier Redundancy. IEEE J. Solid State Circuits 46 (10) (2011)
Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
8T SRAM with Mimicked Negative Bit-lines and Charge Limited Sequential sense amplifier for wireless sensor nodes. ESSCIRC (2011)
Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
A 4.4pJ/access 80MHz, 2K word } 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications. ESSCIRC (2010)
Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini
A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context. DATE (2009)
Stefan Cosemans, Wim Dehaene, Francky Catthoor
A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM With 850 MHz Boost Mode in 90 nm CMOS With Tunable Sense Amplifiers. IEEE J. Solid State Circuits 44 (7) (2009)
Stefan Cosemans, Wim Dehaene, Francky Catthoor
A 3.6pJ/access 480MHz, 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability. ESSCIRC (2008)
Wim Dehaene, Stefan Cosemans, Anselme Vignon, F. Catthoora, Peter Geens
Embedded SRAM design in deep deep submicron technologies. ESSCIRC (2007)
Stefan Cosemans, Wim Dehaene, Francky Catthoor
A Low-Power Embedded SRAM for Wireless Applications. IEEE J. Solid State Circuits 42 (7) (2007)