Debjyoti Bhattacharjee

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 47

Top Topics

Space Exploration

Logic Synthesis

Top Venues

Publications

Debjyoti Bhattacharjee, Anmol, Tommaso Marinelli, Karan Pathak, Peter Kourzanov
Full-stack evaluation of Machine Learning inference workloads for RISC-V systems. CoRR (2024)
Yukai Chen, Simei Yang, Debjyoti Bhattacharjee, Francky Catthoor, Arindam Mallik
SAfEPaTh: A System-Level Approach for Efficient Power and Thermal Estimation of Convolutional Neural Network Accelerator. CoRR (2024)
Giuseppe M. Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. CoRR (2024)
Paul Delestrac, Debjyoti Bhattacharjee, Simei Yang, Diksha Moolchandani, Francky Catthoor, Lionel Torres, David Novo
Multi-Level Analysis of GPU Utilization in ML Training Workloads. DATE (2024)
Iman Dadras, Giuseppe Maria Sarda, Nathan Laubeuf, Debjyoti Bhattacharjee, Arindam Mallik
AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference. IEEE Access 11 (2023)
Anupam Chattopadhyay, Debjyoti Bhattacharjee, Subhamoy Maitra
Improved Linear Decomposition of Majority and Threshold Boolean Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. IEEE J. Solid State Circuits 58 (1) (2023)
Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. IISWC (2023)
Simei Yang, Debjyoti Bhattacharjee, Vinay B. Y. Kumar, Saikat Chatterjee, Sayandip De, Peter Debacker, Diederik Verkest, Arindam Mallik, Francky Catthoor
AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (2) (2022)
Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration. ACM Trans. Design Autom. Electr. Syst. 27 (5) (2022)
Michele Caselli, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest
Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation. ISCAS (2022)
Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe M. Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian P. Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC (2022)
Debjyoti Bhattacharjee, Anirban Majumder, Anupam Chattopadhyay
In-memory realization of SHA-2 using ReVAMP architecture. VLSI Design (2021)
Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. ISCAS (2021)
Shubham Rai, Mengyun Liu, Anteneh Gebregiorgis, Debjyoti Bhattacharjee, Krishnendu Chakrabarty, Said Hamdioui, Anupam Chattopadhyay, Jens Trommer, Akash Kumar
Perspectives on Emerging Computation-in-Memory Paradigms. DATE (2021)
Debjyoti Bhattacharjee, Anupam Chattopadhyay, Srijit Dutta, Ronny Ronen, Shahar Kvatinsky
CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit. ICCAD (2020)
Debjyoti Bhattacharjee, Yaswanth Tavva, Arvind Easwaran, Anupam Chattopadhyay
Crossbar-Constrained Technology Mapping for ReRAM Based In-Memory Computing. IEEE Trans. Computers 69 (5) (2020)
Rotem Ben Hur, Ronny Ronen, Ameer Haj Ali, Debjyoti Bhattacharjee, Adi Eliahu, Natan Peled, Shahar Kvatinsky
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Debjyoti Bhattacharjee, Anupam Chattopadhyay, Srijit Dutta, Ronny Ronen, Shahar Kvatinsky
CONTRA: Area-Constrained Technology Mapping Framework For Memristive Memory Processing Unit. CoRR (2020)
Srijit Dutta, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay
Efficient Quantum Circuits for Square-Root and Inverse Square-Root. VLSI Design (2020)
Debjyoti Bhattacharjee, Abdullah Ash-Saki, Mahabubul Alam, Anupam Chattopadhyay, Swaroop Ghosh
MUQUT: Multi-Constraint Quantum Circuit Mapping on NISQ Computers: Invited Paper. ICCAD (2019)
Debjyoti Bhattacharjee, Mathias Soeken, Srijit Dutta, Anupam Chattopadhyay, Giovanni De Micheli
Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis. ISMVL (2019)
Debjyoti Bhattacharjee, Anupam Chattopadhyay, Ricardo Jack Liwongan
Accelerating Binary-Matrix Multiplication on FPGA. SoCC (2019)
Valerio Tenace, Roberto Giorgio Rizzo, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Andrea Calimera
SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars. DATE (2019)
Laxmidhar Biswal, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Hafizur Rahaman
New techniques for fault-tolerant decomposition of Multi-Controlled Toffoli gate. CoRR (2019)
Debjyoti Bhattacharjee, Luca G. Amarù, Anupam Chattopadhyay
Technology-aware logic synthesis for ReRAM based in-memory computing. DATE (2018)
Anmol Prakash Surhonne, Debjyoti Bhattacharjee, Anupam Chattopadhyay
Synthesis of Multi-valued Literal Using Lukasiewicz Logic. ISMVL (2018)
Tarun Vatwani, Arko Dutt, Debjyoti Bhattacharjee, Anupam Chattopadhyay
Floating Point Multiplication Mapping on ReRAM Based In-memory Computing Architecture. VLSI Design (2018)
Swagata Mandal, Yaswanth Tavva, Debjyoti Bhattacharjee, Anupam Chattopadhyay
ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code. VLSI-SoC (Selected Papers) (2018)
Debjyoti Bhattacharjee, Anupam Chattopadhyay
Synthesis, Technology Mapping and Optimization for Emerging Technologies. ISVLSI (2018)
Debjyoti Bhattacharjee, Arko Dutt, Anupam Chattopadhyay
MAMI: Majority and Multi-Input Logic on Memristive Crossbar Array. APCCAS (2018)
Srijit Dutta, Debjyoti Bhattacharjee, Anupam Chattopadhyay
Quantum Circuits for Toom-Cook Multiplication. CoRR (2018)
Debjyoti Bhattacharjee, Yaswanth Tavva, Arvind Easwaran, Anupam Chattopadhyay
Crossbar-Constrained Technology Mapping for ReRAM based In-Memory Computing. CoRR (2018)
Swagata Mandal, Debjyoti Bhattacharjee, Yaswanth Tavva, Anupam Chattopadhyay
ReRAM-based In-Memory Computation of Galois Field arithmetic. VLSI-SoC (2018)
Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay
Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays. ACM J. Emerg. Technol. Comput. Syst. 14 (2) (2018)
Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Anupam Chattopadhyay
Efficient complementary resistive switch-based crossbar array Booth multiplier. Microelectron. J. 64 (2017)
Debjyoti Bhattacharjee, Anupam Chattopadhyay
Efficient Binary Basic Linear Algebra Operations on ReRAM Crossbar Arrays. VLSI Design (2017)
Debjyoti Bhattacharjee, Vikramkumar Pudi, Anupam Chattopadhyay
SHA-3 implementation using ReRAM based in-memory computing architecture. ISQED (2017)
Debjyoti Bhattacharjee, Anupam Chattopadhyay
Depth-Optimal Quantum Circuit Placement for Arbitrary Topologies. CoRR (2017)
Debjyoti Bhattacharjee, Rajeswari Devadoss, Anupam Chattopadhyay
ReVAMP: ReRAM based VLIW architecture for in-memory computing. DATE (2017)
Debjyoti Bhattacharjee, Arvind Easwaran, Anupam Chattopadhyay
Area-constrained technology mapping for in-memory computing using ReRAM devices. ASP-DAC (2017)
Debjyoti Bhattacharjee, Anupam Chattopadhyay
Delay-optimal technology mapping for in-memory computing using ReRAM devices. ICCAD (2016)
Debjyoti Bhattacharjee, Paheli Bhattacharya
Ensemble Classifier based approach for Code-Mixed Cross-Script Question Classification. FIRE (Working Notes) (2016)
Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Stephan Menzel, Anupam Chattopadhyay
Efficient implementation of multiplexer and priority multiplexer using 1S1R ReRAM crossbar arrays. MWSCAS (2016)
Debjyoti Bhattacharjee, Soumi Chattopadhyay, Ansuman Banerjee
EAST: Efficient Assertion Simulation techniques. DATE (2016)
Debjyoti Bhattacharjee, Anupam Chattopadhyay
Hardware Accelerator for Stream Cipher Spritz. SECRYPT (2016)
Debjyoti Bhattacharjee, Farhad Merchant, Anupam Chattopadhyay
Enabling in-memory computation of binary BLAS using ReRAM crossbar arrays. VLSI-SoC (2016)
Debjyoti Bhattacharjee, Ansuman Banerjee, Anupam Chattopadhyay
EvoDeb: Debugging Evolving Hardware Designs. VLSI Design (2015)
Debjyoti Bhattacharjee, Ashish Bakshi, Kuntal Ghosh
Comparison Between an HVS Inspired Linear Filter and the Bilateral Filter in Performing "Vision at a Glance" through Smoothing with Edge Preservation. Int. J. Image Graph. 15 (4) (2015)
Debjyoti Bhattacharjee, Anupam Chattopadhyay
Efficient Hardware Accelerator for AEGIS-128 Authenticated Encryption. Inscrypt (2014)