SHA-3 implementation using ReRAM based in-memory computing architecture.
Debjyoti BhattacharjeeVikramkumar PudiAnupam ChattopadhyayPublished in: ISQED (2017)
Keyphrases
- layered architecture
- memory management
- architectural design
- hardware architecture
- associative memory
- network architecture
- hardware architectures
- software implementation
- parallel computers
- efficient implementation
- vlsi implementation
- platform independent
- core components
- design considerations
- design methodology
- memory space
- main memory
- memory access
- client server architecture
- parallel architecture
- memory hierarchy
- dedicated hardware
- highly modular
- single instruction multiple data
- vlsi architecture
- neural network
- floating point
- parallel implementation
- memory requirements
- index structure