Roberto Giorgio Rizzo

Publication Activity (10 Years)

Years Active: 2015-2021
Publications (10 Years): 13

Top Topics

Logic Synthesis

Error Detection

Classification Trees

Top Venues

VLSI-SoC (Selected Papers)

Publications

Luca Mocerino, Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Enrico Macii
Adaptive Test-Time Augmentation for Low-Power CPU. CoRR (2021)
Luca Mocerino, Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Enrico Macii
On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets. VLSI-SoC (Selected Papers) (2021)
Luca Mocerino, Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Enrico Macii
AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets. VLSI-SoC (2021)
Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera
TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets. IEEE Trans. Circuits Syst. II Express Briefs 68 (2) (2021)
Roberto Giorgio Rizzo, Andrea Calimera, Jun Zhou
Corrigendum to"Approximate error detection-correction for efficient adaptive voltage Over-Scaling"[Integration 63 (2018) 220-231]. Integr. 70 (2020)
Valentino Peluso, Roberto Giorgio Rizzo, Antonio Cipolletta, Andrea Calimera
Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets. SNAMS (2019)
Valerio Tenace, Roberto Giorgio Rizzo, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Andrea Calimera
SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars. DATE (2019)
Roberto Giorgio Rizzo, Andrea Calimera, Jun Zhou
Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling. Integr. 63 (2018)
Roberto Giorgio Rizzo, Valerio Tenace, Andrea Calimera
Multiplication by Inference using Classification Trees: A Case-Study Analysis. ISCAS (2018)
Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Jun Zhou
On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling. VLSI-SoC (Selected Papers) (2017)
Roberto Giorgio Rizzo, Valentino Peluso, Andrea Calimera, Jun Zhou, Xin Liu
Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS. VLSI-SoC (2017)
Roberto Giorgio Rizzo, Andrea Calimera
Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling. NGCAS (2017)
Valentino Peluso, Roberto Giorgio Rizzo, Andrea Calimera, Enrico Macii, Massimo Alioto
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping. VLSI-SoC (Selected Papers) (2016)
Roberto Giorgio Rizzo, Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino
Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions. ACM Great Lakes Symposium on VLSI (2015)