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Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping.
Valentino Peluso
Roberto Giorgio Rizzo
Andrea Calimera
Enrico Macii
Massimo Alioto
Published in:
VLSI-SoC (Selected Papers) (2016)
Keyphrases
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fine grain
coarse grain
parallel computation
high speed
distributed memory
real time
efficient implementation