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ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code.

Swagata MandalYaswanth TavvaDebjyoti BhattacharjeeAnupam Chattopadhyay
Published in: VLSI-SoC (Selected Papers) (2018)
Keyphrases
  • error correcting
  • error correcting codes
  • error correction
  • error detection
  • block codes
  • error resilience
  • reed solomon
  • channel coding
  • processor core
  • error propagation