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Adi Eliahu
ORCID
Publication Activity (10 Years)
Years Active: 2020-2022
Publications (10 Years): 7
Top Topics
Instruction Set Architecture
Technological Advances
Compute Intensive
Analytical Models
Top Venues
CoRR
ACM J. Emerg. Technol. Comput. Syst.
VLSI-SoC (Selected Papers)
VLSI-SOC
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Publications
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Ronny Ronen
,
Adi Eliahu
,
Orian Leitersdorf
,
Natan Peled
,
Kunal Korgaonkar
,
Anupam Chattopadhyay
,
Ben Perach
,
Shahar Kvatinsky
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems.
ACM J. Emerg. Technol. Comput. Syst.
18 (2) (2022)
Adi Eliahu
,
Rotem Ben Hur
,
Ronny Ronen
,
Shahar Kvatinsky
abstractPIM: A Technology Backward-Compatible Compilation Flow for Processing-In-Memory.
CoRR
(2022)
Adi Eliahu
,
Ronny Ronen
,
Pierre-Emmanuel Gaillardon
,
Shahar Kvatinsky
multiPULPly: A Multiplication Engine for Accelerating Neural Networks on Ultra-low-power Architectures.
ACM J. Emerg. Technol. Comput. Syst.
17 (2) (2021)
Ronny Ronen
,
Adi Eliahu
,
Orian Leitersdorf
,
Natan Peled
,
Kunal Korgaonkar
,
Anupam Chattopadhyay
,
Ben Perach
,
Shahar Kvatinsky
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems.
CoRR
(2021)
Rotem Ben Hur
,
Ronny Ronen
,
Ameer Haj Ali
,
Debjyoti Bhattacharjee
,
Adi Eliahu
,
Natan Peled
,
Shahar Kvatinsky
SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
39 (10) (2020)
Adi Eliahu
,
Rotem Ben Hur
,
Ronny Ronen
,
Shahar Kvatinsky
abstractPIM: Bridging the Gap Between Processing-In-Memory Technology and Instruction Set Architecture.
VLSI-SOC
(2020)
Adi Eliahu
,
Rotem Ben Hur
,
Ronny Ronen
,
Shahar Kvatinsky
abstractPIM: A Technology Backward-Compatible Compilation Flow for Processing-In-Memory.
VLSI-SoC (Selected Papers)
(2020)