Ben Perach

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 21

Top Topics

Analytical Models

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Ben Perach, Ronny Ronen, Benny Kimelfeld, Shahar Kvatinsky
Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics. IEEE Trans. Emerg. Top. Comput. 12 (1) (2024)
Ben Perach, Ronny Ronen, Shahar Kvatinsky
Accelerating Relational Database Analytical Processing with Bulk-Bitwise Processing-in-Memory. CoRR (2023)
Ben Perach, Ronny Ronen, Shahar Kvatinsky
Enabling Relational Database Analytical Processing in Bulk-Bitwise Processing-In-Memory. CoRR (2023)
Ben Perach, Shahar Kvatinsky
An Asynchronous and Low-Power True Random Number Generator using STT-MTJ. CoRR (2023)
Marcel Khalifa, Barak Hoffer, Orian Leitersdorf, Robert Hanhan, Ben Perach, Leonid Yavits, Shahar Kvatinsky
ClaPIM: Scalable Sequence Classification Using Processing-in-Memory. IEEE Trans. Very Large Scale Integr. Syst. 31 (9) (2023)
Ben Perach, Ronny Ronen, Shahar Kvatinsky
Accelerating Relational Database Analytical Processing with Bulk-Bitwise Processing-in-Memory. NEWCAS (2023)
Ben Perach, Ronny Ronen, Shahar Kvatinsky
Enabling Relational Database Analytical Processing in Bulk-Bitwise Processing-In-Memory. SOCC (2023)
Marcel Khalifa, Barak Hoffer, Orian Leitersdorf, Robert Hanhan, Ben Perach, Leonid Yavits, Shahar Kvatinsky
ClaPIM: Scalable Sequence CLAssification using Processing-In-Memory. CoRR (2023)
Ben Perach, Ronny Ronen, Shahar Kvatinsky
On Consistency for Bulk-Bitwise Processing-in-Memory. HPCA (2023)
Ronny Ronen, Adi Eliahu, Orian Leitersdorf, Natan Peled, Kunal Korgaonkar, Anupam Chattopadhyay, Ben Perach, Shahar Kvatinsky
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems. ACM J. Emerg. Technol. Comput. Syst. 18 (2) (2022)
Ben Perach, Ronny Ronen, Benny Kimelfeld, Shahar Kvatinsky
PIMDB: Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics. CoRR (2022)
Ben Perach, Ronny Ronen, Shahar Kvatinsky
On Consistency for Bulk-Bitwise Processing-in-Memory. CoRR (2022)
Orian Leitersdorf, Ben Perach, Ronny Ronen, Shahar Kvatinsky
Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory. CoRR (2021)
Orian Leitersdorf, Ben Perach, Ronny Ronen, Shahar Kvatinsky
Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory. DAC (2021)
Ronny Ronen, Adi Eliahu, Orian Leitersdorf, Natan Peled, Kunal Korgaonkar, Anupam Chattopadhyay, Ben Perach, Shahar Kvatinsky
The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems. CoRR (2021)
Ben Perach, Shahar Kvatinsky
An Asynchronous and Low-Power True Random Number Generator using STT-MTJ. ISCAS (2020)
Ben Perach, Shahar Kvatinsky
An Asynchronous and Low-Power True Random Number Generator Using STT-MTJ. IEEE Trans. Very Large Scale Integr. Syst. 27 (11) (2019)
Nishil Talati, Heonjae Ha, Ben Perach, Ronny Ronen, Shahar Kvatinsky
CONCEPT: A Column-Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM. IEEE Micro 39 (1) (2019)
Ben Perach, Shahar Kvatinsky
STT-ANGIE: Asynchronous True Random Number GEnerator Using STT-MTJ. DATE (2019)
Tzofnat Greenberg-Toledo, Ben Perach, Daniel Soudry, Shahar Kvatinsky
MTJ-Based Hardware Synapse Design for Quantized Deep Neural Networks. CoRR (2019)
Ben Perach, Shlomo Weiss
SiMT-DSP: A Massively Multithreaded DSP Architecture. IEEE Trans. Very Large Scale Integr. Syst. 26 (8) (2018)