Diederik Verkest

Publication Activity (10 Years)

Years Active: 1989-2023
Publications (10 Years): 18

Top Venues

ICICDT

CICC

ISCAS

ESSDERC

Publications

Subhali Subhechha, Stefan Cosemans, Attilio Belmonte, Nouredine Rassoul, Shamin Houshmand Sharifi, Peter Debacker, Diederik Verkest, Romain Delhougne, Gouri Sankar Kar
Demonstration of multilevel multiply accumulate operations for AiMC using engineered a-IGZO transistors-based 2T1C gain cell arrays. IMW (2023)
Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. IEEE J. Solid State Circuits 58 (1) (2023)
Simei Yang, Debjyoti Bhattacharjee, Vinay B. Y. Kumar, Saikat Chatterjee, Sayandip De, Peter Debacker, Diederik Verkest, Arindam Mallik, Francky Catthoor
AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (2) (2022)
Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration. ACM Trans. Design Autom. Electr. Syst. 27 (5) (2022)
Michele Caselli, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest
Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation. ISCAS (2022)
Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe M. Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian P. Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC (2022)
Michele Caselli, Subhali Subhechha, Peter Debacker, Arindam Mallik, Diederik Verkest
Write-Verify Scheme for IGZO DRAM in Analog in-Memory Computing. ISCAS (2022)
Michele Caselli, Ioannis A. Papistas, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest
Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing. NEWCAS (2021)
Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest
Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration. ISCAS (2021)
Jonas Doevenspeck, Peter Vrancx, Nathan Laubeuf, Arindam Mallik, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene
Noise tolerant ternary weight deep neural networks for analog in-memory inference. IJCNN (2021)
Ioannis A. Papistas, Stefan Cosemans, Bram Rooseleer, Jonas Doevenspeck, Myung Hee Na, Arindam Mallik, Peter Debacker, Diederik Verkest
in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration. CICC (2021)
Bram-Ernst Verhoef, Nathan Laubeuf, Stefan Cosemans, Peter Debacker, Ioannis A. Papistas, Arindam Mallik, Diederik Verkest
FQ-Conv: Fully Quantized Convolution for Efficient and Accurate Inference. CoRR (2019)
Jonas Doevenspeck, Robin Degraeve, Andrea Fantini, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene
Low Voltage Transient RESET Kinetic Modeling of OxRRAM for Neuromorphic Applications. IRPS (2019)
Bertrand Parvais, Geert Hellings, Marco Simicic, Pieter Weckx, Jérôme Mitard, Doyoung Jang, V. Deshpande, B. van Liempc, Anabela Veloso, A. Vandooren, Niamh Waldron, Piet Wambacq, Nadine Collaert, Diederik Verkest
Scaling CMOS beyond Si FinFET: an analog/RF perspective. ESSDERC (2018)
Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Alessio Spessot, Diederik Verkest, Anda Mocuta
SRAM designs for 5nm node and beyond: Opportunities and challenges. ICICDT (2017)
Trong Huynh Bao, Julien Ryckaert, Zsolt Tokei, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq
Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond. IEEE Trans. Very Large Scale Integr. Syst. 25 (5) (2017)
Praveen Raghavan, Marie Garcia Bardon, Peter Debacker, P. Schuddinck, Doyoung Jang, Rogier Baert, Diederik Verkest, Aaron Voon-Yew Thean
5nm: Has the time for a device change come? ISQED (2016)
Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED (2016)
Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq
Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. ICICDT (2015)
Nathalie Fievet, Praveen Raghavan, Rogier Baert, Frédéric Robert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
Impact of device and interconnect process variability on clock distribution. ICICDT (2015)
Kazuyuki Tomida, Keizo Hiraga, Morin Dehan, Geert Hellings, Doyoung Jang, Kenichi Miyaguchi, Thomas Chiarella, Minsoo Kim, Anda Mocuta, Naoto Horiguchi, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
Impact of fin shape variability on device performance towards 10nm node. ICICDT (2015)
Bertrand Parvais, Piet Wambacq, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Ken Sawada, Kazuki Nomoto, Tetsuya Oishi, Hiroaki Ammo
A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS. A-SSCC (2015)
Marie Garcia Bardon, P. Schuddinck, Praveen Raghavan, Doyoung Jang, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
Dimensioning for power and performance under 10nm: The limits of FinFETs scaling. ICICDT (2015)
Kenichi Miyaguchi, Bertrand Parvais, Lars-Åke Ragnarsson, Piet Wambacq, Praveen Raghavan, Abdelkarim Mercha, Anda Mocuta, Diederik Verkest, Aaron Thean
Modeling FinFET metal gate stack resistance for 14nm node and beyond. ICICDT (2015)
Pieter Weckx, Ben Kaczer, Praveen Raghavan, Jacopo Franco, Marco Simicic, Philippe J. Roussel, Dimitri Linten, Aaron Thean, Diederik Verkest, Francky Catthoor, Guido Groeseneken
Characterization and simulation methodology for time-dependent variability in advanced technologies. CICC (2015)
Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer
Lateral NWFET optimization for beyond 7nm nodes. ICICDT (2015)
Raf Appeltans, Stefan Cosemans, Praveen Raghavan, Diederik Verkest, Liesbet Van der Perre, Wim Dehaene
STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance. NVMSA (2015)
Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene
Impact of interconnect multiple-patterning variability on SRAMs. DATE (2015)
Praveen Raghavan, Marie Garcia Bardon, Doyoung Jang, P. Schuddinck, Dmitry Yakimets, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Nadine Collaert, Anda Mocuta, Dan Mocuta, Zsolt Tokei, Diederik Verkest, Aaron Thean, A. Steegen
Holisitic device exploration for 7nm node. CICC (2015)
Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, M. Dusa, Arindam Mallik, Sushil Sakhare, B. Vandewalle, Piet Wambacq, Bharani Chava, Kris Croes, Morin Dehan, Doyoung Jang, P. Leray, T.-T. Liu, Kenichi Miyaguchi, Bertrand Parvais, P. Schuddinck, P. Weemaes, Abdelkarim Mercha, Jürgen Bömmels, N. Horiguchi, G. McIntyre, Aaron Thean, Zsolt Tokei, S. Cheng, Diederik Verkest, A. Steegen
Design Technology co-optimization for N10. CICC (2014)
Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Diederik Verkest, Aaron Thean
System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH (2014)
Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC (2014)
Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest
TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes. DAC (2013)
Dragomir Milojevic, Pol Marchal, Erik Jan Marinissen, Geert Van der Plas, Diederik Verkest, Eric Beyne
Design issues in heterogeneous 3D/2.5D integration. ASP-DAC (2013)
Pavel Poliakov, Pieter Blomme, Alessandro Vaglio Pret, Miguel Corbalan Miranda, Roel Gronheid, Diederik Verkest, Jan Van Houdt, Wim Dehaene
Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories. Microelectron. Reliab. 52 (3) (2012)
Lu Zhang, Ke Zhang, Tian Sheuan Chang, Gauthier Lafruit, Georgi Krasimirov Kuzmanov, Diederik Verkest
Real-time high-definition stereo matching on FPGA. FPGA (2011)
Andrej Ivankovic, Geert Van der Plas, V. Moroz, M. Choi, Vladimir Cherman, Abdelkarim Mercha, Paul Marchal, Marcel Gonzalez, Geert Eneman, W. Zhang, Thibault Buisson, Mikael Detalle, Antonio La Manna, Diederik Verkest, Gerald Beyer, Eric Beyne, Bart Vandevelde, Ingrid De Wolf, Dirk Vandepitte
Analysis of microbump induced stress effects in 3D stacked IC technologies. 3DIC (2011)
Vincent Nollet, Diederik Verkest, Henk Corporaal
A Safari Through the MPSoC Run-Time Management Jungle. J. Signal Process. Syst. 60 (2) (2010)
Pavel Poliakov, Ankur Anchlia, Marie Garcia Bardon, Bram Rooseleer, Bart De Wachter, Nadine Collaert, Koen van der Zanden, Wim Dehaene, Diederik Verkest, Miguel Corbalan Miranda
Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM. IEEE Trans. Circuits Syst. II Express Briefs (3) (2010)
Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest, Rudy Lauwereins, Thanos Stouraitis
Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements. ACM Trans. Embed. Comput. Syst. 9 (3) (2010)
Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
EMPIRE: Empirical power/area/timing models for register files. Microprocess. Microsystems 33 (4) (2009)
Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Bingfeng Mei, Francky Catthoor, Diederik Verkest
Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures. IEEE Trans. Very Large Scale Integr. Syst. 17 (1) (2009)
Diederik Verkest
Multimedia systems in a changing technology landscape. ESTIMedia (2009)
Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest, Rudy Lauwereins, Thanos Stouraitis
Spatial locality exploitation for runtime reordering of JPEG2000 wavelet data layouts. ACM Trans. Design Autom. Electr. Syst. 15 (1) (2009)
Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures. IEEE Trans. Computers 58 (3) (2009)
Bjorn De Sutter, Diederik Verkest, Erik Brockmeyer, Eric Delfosse, Arnout Vandecappelle, Jean-Yves Mignolet
Design and Tool Flow of Multimedia MPSoC Platforms. J. Signal Process. Syst. 57 (2) (2009)
Paul Marchal, Bruno Bougard, Guruprasad Katti, Michele Stucchi, Wim Dehaene, Antonis Papanikolaou, Diederik Verkest, Bart Swinnen, Eric Beyne
3-D Technology Assessment: Path-Finding the Technology/Design Sweet-Spot. Proc. IEEE 97 (1) (2009)
Dragomir Milojevic, Luc J. M. Montperrus, Diederik Verkest
Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications. J. Signal Process. Syst. 57 (2) (2009)
Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Spyridon Toulatos, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest
Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments. J. Signal Process. Syst. 56 (2-3) (2009)
Bert Geelen, Aris Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest
Spatial locality trade-offs of wavelet-based applications in dynamic execution environments. ICASSP (2008)
Mladen Berekovic, Frank Bouwens, Tom Vander Aa, Diederik Verkest
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. PATMOS (2008)
Vincent Nollet, Prabhat Avasare, Hendrik Eeckhaut, Diederik Verkest, Henk Corporaal
Run-Time Management of a MPSoC Containing FPGA Fabric Tiles. IEEE Trans. Very Large Scale Integr. Syst. 16 (1) (2008)
David Atienza, Praveen Raghavan, José Luis Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures. Integr. 41 (1) (2008)
Bruno Bougard, Bjorn De Sutter, Diederik Verkest, Liesbet Van der Perre, Rudy Lauwereins
A Coarse-Grained Array Accelerator for Software-Defined Radio Baseband Processing. IEEE Micro 28 (4) (2008)
Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Diederik Verkest
Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor. VLSI Design (2008)
Praveen Raghavan, Andy Lambrechts, Javed Absar, Murali Jayapala, Francky Catthoor, Diederik Verkest
Coffee: COmpiler Framework for Energy-Aware Exploration. HiPEAC (2008)
Anthony Leroy, Dragomir Milojevic, Diederik Verkest, Frédéric Robert, Francky Catthoor
Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip. IEEE Trans. Computers 57 (9) (2008)
Vincent Nollet, Diederik Verkest, Henk Corporaal
A Quick Safari Through the MPSoC Run-Time Management Jungle. ESTIMedia (2007)
Praveen Raghavan, Nandhavel Sethubalasubramanian, Satyakiran Munaga, Estela Rey Ramos, Murali Jayapala, Oliver Weiss, Francky Catthoor, Diederik Verkest
Semi Custom Design: A Case Study on SIMD Shufflers. PATMOS (2007)
José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest
Energy-aware compilation and hardware design for VLIW embedded systems. Int. J. Embed. Syst. 3 (1/2) (2007)
Praveen Raghavan, Satyakiran Munaga, Estela Rey Ramos, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors. ARCS (2007)
Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest, Henk Corporaal
Very wide register: an asymmetric register file organization for low power embedded processors. DATE (2007)
Kristof Denolf, Adrian Chirila-Rus, Paul R. Schumacher, Robert D. Turney, Kees A. Vissers, Diederik Verkest, Henk Corporaal
A Systematic Approach to Design Low-Power Video Codec Cores. EURASIP J. Embed. Syst. 2007 (2007)
Kristof Denolf, Marco Jan Gerrit Bekooij, Johan Cockx, Diederik Verkest, Henk Corporaal
Exploiting the Expressiveness of Cyclo-Static Dataflow to Model Multimedia Implementations. EURASIP J. Adv. Signal Process. 2007 (2007)
Vissarion Ferentinos, Bert Geelen, Francky Catthoor, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest
Adaptive mapping to resource availability for dynamic wavelet-based applications. ESTIMedia (2007)
Vincent Nollet, Prabhat Avasare, Diederik Verkest, Henk Corporaal
Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment. ERSA (2006)
David Atienza, Praveen Raghavan, José L. Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
Compiler-Driven Leakage Energy Reduction in Banked Register Files. PATMOS (2006)
Bert Geelen, Aris Ferentinos, Francky Catthoor, Arnout Vandecappelle, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest
Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications. SiPS (2006)
Daniele Paolo Scarpazza, Praveen Raghavan, David Novo, Francky Catthoor, Diederik Verkest
Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism. PATMOS (2006)
Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors. DATE (2006)
Anthony Leroy, Paul Marchal, Adelina Shickova, Francky Catthoor, Frédéric Robert, Diederik Verkest
Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs. CODES+ISSS (2005)
Richard Stahl, Francky Catthoor, Diederik Verkest
Object-Distribution Analysis for Program Decomposition and Re-Clustering. IPDPS (2005)
Andy Lambrechts, Praveen Raghavan, Anthony Leroy, Guillermo Talavera, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. ASAP (2005)
Bert Geelen, Gauthier Lafruit, Vissarion Ferentinos, Rudy Lauwereins, Diederik Verkest
Memory Hierarchy Energy Cost of a Direct Filtering Implementation of the Wavelet Transform. PATMOS (2005)
Bingfeng Mei, Andy Lambrechts, Diederik Verkest, Jean-Yves Mignolet, Rudy Lauwereins
Architecture Exploration for a Reconfigurable Architecture Template. IEEE Des. Test Comput. 22 (2) (2005)
Vincent Nollet, Prabhat Avasare, Jean-Yves Mignolet, Diederik Verkest
Low Cost Task Migration Initiation in a Heterogeneous MP-SoC. DATE (2005)
Prabhat Avasare, Vincent Nollet, Jean-Yves Mignolet, Diederik Verkest, Henk Corporaal
Centralized end-to-end flow control in a best-effort network-on-chip. EMSOFT (2005)
Richard Stahl, Francky Catthoor, Diederik Verkest
Object-Distribution Analysis: Technique for Parallel Loop Distribution of Object-Oriented Programs. ICPP Workshops (2005)
Javier Resano, Daniel Mozos, Diederik Verkest, Francky Catthoor
A Reconfiguration Manager for Dynamically Reconfigurable Hardware. IEEE Des. Test Comput. 22 (5) (2005)
Richard Stahl, Robert Pasko, Francky Catthoor, Rudy Lauwereins, Diederik Verkest
High-Level Data-Access Analysis for Characterisation of (Sub)task-Level Parallelism in Java. HIPS (2004)
Théodore Marescaux, Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Prabhat Avasare, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
Run-time support for heterogeneous multitasking on reconfigurable SoCs. Integr. 38 (1) (2004)
Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs. Microprocess. Microsystems 28 (5-6) (2004)
Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde
Operating-system controlled network on chip. DAC (2004)
Richard Stahl, Francky Catthoor, Rudy Lauwereins, Diederik Verkest
Design-Time Data-Access Analysis for Parallel Java Programs with Shared-Memory Communication Model. Euro-Par (2004)
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins
Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. DATE (2004)
T. Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frédéric Robert
Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation. FPL (2004)
Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll
Design Style Case Study for Embedded Multi Media Compute Nodes. RTSS (2004)
Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
Designing an Operating System for a Heterogeneous Reconfigurable So. IPDPS (2003)
Frederik Vermeulen, Francky Catthoor, Lode Nachtergaele, Diederik Verkest, Hugo De Man
Power-efficient flexible processor architecture for embedded applications. IEEE Trans. Very Large Scale Integr. Syst. 11 (3) (2003)
Théodore Marescaux, Jean-Yves Mignolet, T. Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
Networks on Chip as Hardware Components of an OS for Reconfigurable Systems. FPL (2003)
Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor
Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. FPL (2003)
Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor
Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. SCOPES (2003)
T. Andrei Bartic, Jean-Yves Mignolet, Vincent Nollet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
Highly scalable network on chip for reconfigurable systems. SoC (2003)
Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. FCCM (2003)
Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor
Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems. ESTIMedia (2003)
Theofanis Orphanoudakis, Stylianos Perissakis, Kostas Pramataris, Nikos A. Nikolaou, Nicholas Zervos, Matthias Steck, Christoph Baumhof, Diederik Verkest, Chantal Ykman-Couvreur, Gregory Doumenis, Fotis Karoubalis, Ioanna Theologitou, Dionisios I. Reisis, George E. Konstantoulakis, Nikos Vogiatzis
Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. Telecommun. Syst. 23 (3-4) (2003)
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. DATE (2003)
Jean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip. DATE (2003)
Vincent Nollet, Jean-Yves Mignolet, T. Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins
Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems. Engineering of Reconfigurable Systems and Algorithms (2003)
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. FPL (2003)

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Publication Activity (10 Years)

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Diederik Verkest