Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM.
Trong Huynh BaoSushil SakhareJulien RyckaertDmitry YakimetsAbdelkarim MerchaDiederik VerkestAaron Voon-Yew TheanPiet WambacqPublished in: ICICDT (2015)
Keyphrases
- cmos technology
- nm technology
- low power
- power consumption
- design process
- case study
- optimal design
- metal oxide semiconductor
- high speed
- parallel processing
- design principles
- design decisions
- human factors
- design space
- user interface
- enabling technology
- optimization algorithm
- cost effective
- information systems
- key technologies
- participatory design