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Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond.

Trong Huynh BaoJulien RyckaertZsolt TokeiAbdelkarim MerchaDiederik VerkestAaron Voon-Yew TheanPiet Wambacq
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2017)
Keyphrases
  • statistical analysis
  • high speed
  • data driven
  • graph structure
  • database
  • real time
  • statistical models
  • user requirements
  • statistical information
  • bayesian networks
  • image registration