Luca Gaetano Amarù

Publication Activity (10 Years)

Years Active: 2011-2021
Publications (10 Years): 24

Top Topics

Logic Synthesis

Upper Approximation

Binary Decision Diagrams

Top Venues

Publications

Luca Gaetano Amarù, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
LUT-Based Optimization For ASIC Design Flow. DAC (2021)
Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Giovanni De Micheli
Logic Synthesis for Established and Emerging Computing. Proc. IEEE 107 (1) (2019)
Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Winston Haaswijk, Giovanni De Micheli
Mapping Monotone Boolean Functions into Majority. IEEE Trans. Computers 68 (5) (2019)
Mathias Soeken, Winston Haaswijk, Eleonora Testa, Alan Mishchenko, Luca Gaetano Amarù, Robert K. Brayton, Giovanni De Micheli
Practical exact synthesis. DATE (2018)
Winston Haaswijk, Luca Gaetano Amarù, Patrick Vuillod, Jiong Luo, Mathias Soeken, Giovanni De Micheli
Integrated ESOP Refactoring for Industrial Designs. ICECS (2018)
Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Janet Olson, Robert K. Brayton, Giovanni De Micheli
Improvements to boolean resynthesis. DATE (2018)
Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. ACM Great Lakes Symposium on VLSI (2017)
Luca Gaetano Amarù, Patrick Vuillod, Jiong Luo, Janet Olson
Logic optimization and synthesis: Trends and directions in industry. DATE (2017)
Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Exact Synthesis of Majority-Inverter Graphs and Its Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (11) (2017)
Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli
Enabling exact delay synthesis. ICCAD (2017)
Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
Wave pipelining for majority-based beyond-CMOS technologies. DATE (2017)
Winston Haaswijk, Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A novel basis for logic rewriting. ASP-DAC (2017)
Luca Gaetano Amarù, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Multi-level logic benchmarks: An exactness study. ASP-DAC (2017)
Pierre-Emmanuel Gaillardon, Romain Magni, Luca Gaetano Amarù, Mehdi Hasan, Ross Walker, Berardi Sensale Rodriguez, Jean-Frédéric Christmann, Edith Beigné
Three-Independent-Gate Transistors: Opportunities in digital, analog and RF applications. LATS (2016)
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli
The Programmable Logic-in-Memory (PLiM) computer. DATE (2016)
Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Optimizing Majority-Inverter Graphs with functional hashing. DATE (2016)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli
A Sound and Complete Axiomatization of Majority-n Logic. IEEE Trans. Computers 65 (9) (2016)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Majority-Inverter Graph: A New Paradigm for Logic Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (5) (2016)
Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Inversion optimization in Majority-Inverter Graphs. NANOARCH (2016)
Anupam Chattopadhyay, Luca Gaetano Amarù, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Notes on Majority Boolean Algebra. ISMVL (2016)
Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli
An MIG-based compiler for programmable logic-in-memory architectures. DAC (2016)
Pierre-Emmanuel Gaillardon, Mehdi Hasan, Anirban Saha, Luca Gaetano Amarù, Ross Walker, Berardi Sensale Rodriguez
Digital, analog and RF design opportunities of three-independent-gate transistors. ISCAS (2016)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Robert Wille, Giovanni De Micheli
Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking. DATE (2016)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Majority-based synthesis for nanotechnologies. ASP-DAC (2016)
Sandeep Miryala, Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino, Luca Gaetano Amarù, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. ACM Great Lakes Symposium on VLSI (2015)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli
A Sound and Complete Axiomatization of Majority-n Logic. CoRR (2015)
Luca Gaetano Amarù, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
Multiple Independent Gate FETs: How many gates do we need? ASP-DAC (2015)
Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli
Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only). FPGA (2015)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
New Logic Synthesis as Nanotechnology Enabler. Proc. IEEE 103 (11) (2015)
Winston Haaswijk, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
NEM relay design with biconditional binary decision diagrams. NANOARCH (2015)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Maciej J. Ciesielski, Giovanni De Micheli
Exploiting Circuit Duality to Speed up SAT. ISVLSI (2015)
Anupam Chattopadhyay, Alessandro Littarru, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Reversible Logic Synthesis via Biconditional Binary Decision Diagrams. ISMVL (2015)
Johan Broc, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jaume Joven Murillo, Krishna V. Palem, Giovanni De Micheli
A fast pruning technique for low-power inexact Circuit design. LASCAS (2015)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Andreas Burg, Giovanni De Micheli
Data compression via logic synthesis. ASP-DAC (2014)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization. DAC (2014)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
An efficient manipulation package for Biconditional Binary Decision Diagrams. DATE (2014)
Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Diederik Verkest, Aaron Thean
System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH (2014)
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli
A new basic logic structure for data-path computation (abstract only). FPGA (2014)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form. IEEE J. Emerg. Sel. Topics Circuits Syst. 4 (4) (2014)
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli
Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis. ISVLSI (2014)
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jian Zhang, Giovanni De Micheli
Advanced system on a chip design based on controllable-polarity FETs. DATE (2014)
Odysseas Zografos, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli
Majority Logic Synthesis for Spin Wave Technology. DSD (2014)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli
Power-Gated Differential Logic Style Based on Double-Gate Controllable-Polarity Transistors. IEEE Trans. Circuits Syst. II Express Briefs (10) (2013)
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. DATE (2013)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition. DAC (2013)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
MIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits. ASP-DAC (2013)
Ogun Turkyilmaz, Fabien Clermidy, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET. ISCAS (2013)
Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amarù, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
Towards structured ASICs using polarity-tunable Si nanowire transistors. DAC (2013)
Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits. DATE (2013)
Luca Gaetano Amarù, Maurizio Martina, Guido Masera
High Speed Architectures for Finding the First two Maximum/Minimum Values. IEEE Trans. Very Large Scale Integr. Syst. 20 (12) (2012)
Stefano Frache, Luca Gaetano Amarù, Mariagrazia Graziano, Maurizio Zamboni
Nanofabric power analysis: Biosequence alignment case study. NANOARCH (2011)