Xifan Tang

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 36

Top Topics

Mechanical Devices

Evaluation Framework

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon
A Scalable and Area-Efficient Configuration Circuitry for Semi-Custom FPGA Design. IEEE Trans. Very Large Scale Integr. Syst. 31 (8) (2023)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction. IEEE Trans. Very Large Scale Integr. Syst. 31 (10) (2023)
Anubhav Mishra, Nanditha Rao, Ganesh Gore, Xifan Tang
Architectural Exploration of Heterogeneous FPGAs for Performance Enhancement of ML Benchmarks. APCCAS (2023)
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
ALICE: An Automatic Design Flow for eFPGA Redaction. CoRR (2022)
Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato
ALICE: an automatic design flow for eFPGA redaction. DAC (2022)
Aurélien Alacchi, Edouard Giacomin, Xifan Tang, Pierre-Emmanuel Gaillardon
Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs. ISCAS (2021)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Exploring eFPGA-based Redaction for IP Protection. ICCAD (2021)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Exploring eFPGA-based Redaction for IP Protection. CoRR (2021)
Scott Temple, Walter Lau Neto, Ashton Snelgrove, Xifan Tang, Pierre-Emmanuel Gaillardon
Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis. DAC (2021)
Ganesh Gore, Xifan Tang, Pierre-Emmanuel Gaillardon
A Scalable and Robust Hierarchical Floorplanning to Enable 24-hour Prototyping for 100k-LUT FPGAs. ISPD (2021)
Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters For IP Redaction. CoRR (2021)
Xifan Tang, Ganesh Gore, Grant Brown, Pierre-Emmanuel Gaillardon
Taping out an FPGA in 24 hours with OpenFPGA: The SOFA Project. FPL (2021)
Max Austin, Scott Temple, Walter Lau Neto, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
A Scalable Mixed Synthesis Framework for Heterogeneous Networks. DATE (2020)
Xifan Tang, Edouard Giacomin, Baudouin Chauviere, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs. IEEE Micro 40 (4) (2020)
Xifan Tang, Edouard Giacomin, Patsy Cadareanu, Ganesh Gore, Pierre-Emmanuel Gaillardon
A RRAM-based FPGA for Energy-efficient Edge Computing. DATE (2020)
Walter Lau Neto, Max Austin, Scott Temple, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper. ICCAD (2019)
Walter Lau Neto, Xifan Tang, Max Austin, Luca G. Amarù, Pierre-Emmanuel Gaillardon
Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs. ISVLSI (2019)
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories. VLSI-SoC (2019)
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Pierre-Emmanuel Gaillardon
A Study on Switch Block Patterns for Tileable FPGA Routing Architectures. FPT (2019)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 27 (3) (2019)
João Vieira, Edouard Giacomin, Yasir Mahmood Qureshi, Marina Zapater, Xifan Tang, Shahar Kvatinsky, David Atienza, Pierre-Emmanuel Gaillardon
Accelerating Inference on Binary Neural Networks with Digital RRAM Processing. VLSI-SoC (Selected Papers) (2019)
Xifan Tang, Edouard Giacomin, Aurélien Alacchi, Baudouin Chauviere, Pierre-Emmanuel Gaillardon
OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs. FPL (2019)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Post-P&R Performance and Power Analysis for RRAM-Based FPGAs. IEEE J. Emerg. Sel. Topics Circuits Syst. 8 (3) (2018)
Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
A High-Performance FPGA Architecture Using One-Level RRAM-Based Multiplexers. IEEE Trans. Emerg. Top. Comput. 5 (2) (2017)
Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. ACM Great Lakes Symposium on VLSI (2017)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2017)
Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Optimization opportunities in RRAM-based FPGA architectures. LASCAS (2017)
Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
Physical Design Considerations of One-level RRAM-based Routing Multiplexers. ISPD (2017)
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only). FPGA (2016)
Xifan Tang, Gain Kim, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A Study on the Programming Structures for RRAM-Based FPGA Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2016)
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Accurate power analysis for near-Vt RRAM-based FPGA. FPL (2015)
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
FPGA-SPICE: A simulation-based power estimation framework for FPGAs. ICCD (2015)
Somayyeh Rahimian Omam, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A study on buffer distribution for RRAM-based FPGA routing structures. LASCAS (2015)
Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli
Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only). FPGA (2015)
Pierre-Emmanuel Gaillardon, Xifan Tang, Jury Sandrini, Maxime Thammasack, Somayyeh Rahimian Omam, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
A ultra-low-power FPGA based on monolithically integrated RRAMs. DATE (2015)
Pierre-Emmanuel Gaillardon, Xifan Tang, Gain Kim, Giovanni De Micheli
A Novel FPGA Architecture Based on Ultrafine Grain Reconfigurable Logic Cells. IEEE Trans. Very Large Scale Integr. Syst. 23 (10) (2015)
Xifan Tang, Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
TSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETs. ISCAS (2014)
Pierre-Emmanuel Gaillardon, Xifan Tang, Giovanni De Micheli
Novel configurable logic block architecture exploiting controllable-polarity transistors. ReCoSoC (2014)
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A high-performance low-power near-Vt RRAM-based FPGA. FPT (2014)
Jian Zhang, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2014)
Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
Pattern-based FPGA logic block and clustering algorithm. FPL (2014)
Hu Xu, Vasilis F. Pavlidis, Xifan Tang, Wayne P. Burleson, Giovanni De Micheli
Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise. IEEE Trans. Very Large Scale Integr. Syst. 21 (12) (2013)
Somayyeh Rahimian, Vasilis F. Pavlidis, Xifan Tang, Giovanni De Micheli
An Enhanced Design Methodology for Resonant Clock Trees. J. Low Power Electron. 9 (2) (2013)