Walter Lau Neto

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 19

Top Topics

Supervised Learning

Logic Synthesis

Multiarmed Bandit

Optimization Procedure

Top Venues

Publications

Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
Scalable Sequential Optimization Under Observability Don't Cares. DATE (2024)
Walter Lau Neto, Yingjie Li, Pierre-Emmanuel Gaillardon, Cunxi Yu
FlowTune: End-to-End Automatic Logic Optimization Exploration via Domain-Specific Multiarmed Bandit. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (6) (2023)
Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
Scalable Sequential Optimization Under Observability Don't Cares. CoRR (2023)
Walter Lau Neto, Luca G. Amarù, Vinicius Possani, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon
Improving LUT-based optimization for ASICs. DAC (2022)
Gabriel Ammes, Walter Lau Neto, Paulo F. Butzen, Pierre-Emmanuel Gaillardon, Renato P. Ribas
A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Walter Lau Neto, Yingjie Li, Pierre-Emmanuel Gaillardon, Cunxi Yu
End-to-end Automatic Logic Optimization Exploration via Domain-specific Multi-armed Bandit. CoRR (2022)
Scott Temple, Walter Lau Neto, Ashton Snelgrove, Xifan Tang, Pierre-Emmanuel Gaillardon
Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis. DAC (2021)
Walter Lau Neto, Matheus T. Moreira, Yingjie Li, Luca G. Amarù, Cunxi Yu, Pierre-Emmanuel Gaillardon
SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping. DAC (2021)
Gabriel Ammes, Walter Lau Neto, Paulo F. Butzen, Pierre-Emmanuel Gaillardon, Renato P. Ribas
A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal. CoRR (2021)
Walter Lau Neto, Matheus Trevisan Moreira, Luca G. Amarù, Cunxi Yu, Pierre-Emmanuel Gaillardon
Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization. ASP-DAC (2021)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE (2021)
Max Austin, Scott Temple, Walter Lau Neto, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
A Scalable Mixed Synthesis Framework for Heterogeneous Networks. DATE (2020)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR (2020)
Walter Lau Neto, Vinicius N. Possani, Felipe S. Marranghello, Jody Maick Matos, Pierre-Emmanuel Gaillardon, André Inácio Reis, Renato Perez Ribas
Exact Benchmark Circuits for Logic Synthesis. IEEE Des. Test 37 (3) (2020)
Walter Lau Neto, Max Austin, Scott Temple, Luca G. Amarù, Xifan Tang, Pierre-Emmanuel Gaillardon
LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper. ICCAD (2019)
Walter Lau Neto, Xifan Tang, Max Austin, Luca G. Amarù, Pierre-Emmanuel Gaillardon
Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs. ISVLSI (2019)
Walter Lau Neto, Vinicius N. Possani, Felipe S. Marranghello, Jody Maick Matos, André Inácio Reis, Renato P. Ribas
Exact Multi-Level Benchmark Circuit Generation for Logic Synthesis Evaluation. SBCCI (2018)
Ricardo A. Guazzelli, Matheus T. Moreira, Walter Lau Neto, Ney Laert Vilar Calazans
Sleep convention logic isochronic fork: an analysis. SBCCI (2017)
Matheus Gibiluka, Matheus Trevisan Moreira, Walter Lau Neto, Ney Laert Vilar Calazans
A standard cell characterization flow for non-standard voltage supplies. SBCCI (2016)