Jie-Hong R. Jiang

Publication Activity (10 Years)

Years Active: 1997-2024
Publications (10 Years): 70

Top Topics

Boolean Satisfiability

Delay Insensitive

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Yu-Wei Fan, Jie-Hong R. Jiang
Unifying Decision and Function Queries in Stochastic Boolean Satisfiability. AAAI (2024)
Yun-Rong Luo, Che Cheng, Jie-Hong R. Jiang
A Resolution Proof System for Dependency Stochastic Boolean Satisfiability. J. Autom. Reason. 67 (3) (2023)
Kuo-Wei Ho, Shao-Ting Chung, Tian-Fu Chen, Yu-Wei Fan, Che Cheng, Cheng-Han Liu, Jie-Hong R. Jiang
WolFEx: Word-Level Function Extraction and Simplification from Gate-Level Arithmetic Circuits. ICCAD (2023)
Che Cheng, Jie-Hong R. Jiang
Lifting (D)QBF Preprocessing and Solving Techniques to (D)SSAT. AAAI (2023)
Yu-Shan Huang, Jie-Hong R. Jiang
Circuit Learning: From Decision Trees to Decision Graphs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Jie-Hong R. Jiang
Second-Order Quantified Boolean Logic. AAAI (2023)
Chun-Yu Wei, Jie-Hong R. Jiang
Don't-Care Aware ESOP Extraction via Reduced Decomposition-Tree Exploration. DAC (2023)
Yu-Shan Huang, Jie-Hong R. Jiang, Alan Mishchenko
Quantized Neural Network Synthesis for Direct Logic Circuit Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (2) (2023)
Tian-Fu Chen, Chun-Yu Wei, Jie-Hong R. Jiang
VanQiRA: A Vanishing-State-Based Framework for Quantum Circuit Runtime Assertion. QCE (2023)
Yu-Wei Fan, Jie-Hong R. Jiang
SharpSSAT: A Witness-Generating Stochastic Boolean Satisfiability Solver. AAAI (2023)
Cheng-Han Hsieh, Jie-Hong R. Jiang
Encoding Probabilistic Graphical Models into Stochastic Boolean Satisfiability. IJCAI (2022)
Wan-Hsuan Lin, Chia-Hsuan Su, Jie-Hong R. Jiang
Language Equation Solving via Boolean Automata Manipulation. ICCAD (2022)
Kuan-Hua Tu, Hung-En Wang, Jie-Hong R. Jiang, Natalia Kushik, Nina Yevtushenko
Homing Sequence Derivation With Quantified Boolean Satisfiability. IEEE Trans. Computers 71 (3) (2022)
Chia-Chih Chi, Jie-Hong R. Jiang
Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (4) (2022)
Chun-Yu Wei, Yuan-Hung Tsai, Chiao-Shan Jhang, Jie-Hong R. Jiang
Accurate BDD-based unitary operator manipulation for scalable and robust quantum circuit verification. DAC (2022)
Giovanni De Micheli, Jie-Hong R. Jiang, Robert Rand, Kaitlin Smith, Mathias Soeken
Advances in Quantum Computation and Quantum Technologies: A Design Automation Perspective. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (3) (2022)
Tian-Fu Chen, Jie-Hong R. Jiang, Min-Hsiu Hsieh
Partial Equivalence Checking of Quantum Circuits. QCE (2022)
Chang-Jun Wang, Jie-Hong R. Jiang
Reconfigurable Biochemical Circuit Synthesis from Biomachine Specification. BioCAS (2022)
Jie-Hong R. Jiang, Giovanni De Micheli, Kaitlin Smith, Mathias Soeken
Design and Automation for Quantum Computation and Quantum Technologies. IEEE J. Emerg. Sel. Topics Circuits Syst. 12 (3) (2022)
Nian-Ze Lee, Jie-Hong R. Jiang
Constraint Solving for Synthesis and Verification of Threshold Logic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (5) (2021)
Nian-Ze Lee, Jie-Hong R. Jiang
Dependency Stochastic Boolean Satisfiability: A Logical Formalism for NEXPTIME Decision Problems with Uncertainty. AAAI (2021)
Yuan-Hung Tsai, Jie-Hong R. Jiang, Chiao-Shan Jhang
Bit-Slicing the Hilbert Space: Scaling Up Accurate Quantum Circuit Simulation. DAC (2021)
Pei-Wei Chen, Yu-Ching Huang, Jie-Hong R. Jiang
A Sharp Leap from Quantified Boolean Formula to Stochastic Boolean Satisfiability Solving. AAAI (2021)
He-Teng Zhang, Masahiro Fujita, Chung-Kuan Cheng, Jie-Hong R. Jiang
SAT-Based On-Track Bus Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (4) (2021)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. DATE (2021)
He-Teng Zhang, Jie-Hong R. Jiang, Luca G. Amarù, Alan Mishchenko, Robert K. Brayton
Deep Integration of Circuit Simulator and SAT Solver. DAC (2021)
He-Teng Zhang, Jie-Hong R. Jiang, Alan Mishchenko
A Circuit-Based SAT Solver for Logic Synthesis. ICCAD (2021)
Yen-Ting Lin, Jie-Hong R. Jiang, Victor N. Kravets
Symbolic Uniform Sampling with XOR Circuits. ICCAD (2020)
Po-Chun Chien, Jie-Hong R. Jiang
Time Multiplexing via Circuit Folding. DAC (2020)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR (2020)
Jie-Hong R. Jiang, Victor N. Kravets, Nian-Ze Lee
Engineering Change Order for Combinational and Sequential Design Rectification. DATE (2020)
Victor N. Kravets, Jie-Hong R. Jiang, Heinz Riener
Learning to Automate the Design Updates From Observed Engineering Changes in the Chip Development Cycle. DATE (2020)
Yuan-Hung Tsai, Jie-Hong R. Jiang, Chiao-Shan Jhang
Bit-Slicing the Hilbert Space: Scaling Up Accurate Quantum Circuit Simulation to a New Level. CoRR (2020)
He-Teng Zhang, Jie-Hong R. Jiang
SFO: A Scalable Approach to Fanout-Bounded Logic Synthesis for Emerging Technologies. DAC (2020)
Yu-Chou Lin, Jie-Hong R. Jiang
Mining Biochemical Circuits from Enzyme Databases via Boolean Reasoning. ICCAD (2020)
Nian-Ze Lee, Jie-Hong R. Jiang
Dependency Stochastic Boolean Satisfiability: A Logical Formalism for NEXPTIME Decision Problems with Uncertainty. CoRR (2019)
Yi-Fan Evan Chang, Ruei-Yang Huang, Jie-Hong R. Jiang
Effective FPGA Resource Utilization for Quasi Delay Insensitive Implementation of Asynchronous Circuits. ASYNC (2019)
Siang-Yun Lee, Nian-Ze Lee, Jie-Hong R. Jiang
Searching Parallel Separating Hyperplanes for Effective Compression of Threshold Logic Networks. ICCAD (2019)
Hao Chen, Shao-Chun Hung, Jie-Hong R. Jiang
Disjoint-Support Decomposition and Extraction for Interconnect-Driven Threshold Logic Synthesis. DAC (2019)
Po-Chun Chien, Jie-Hong R. Jiang
Time-Frame Folding: Back to the Sequentiality. ICCAD (2019)
Victor N. Kravets, Nian-Ze Lee, Jie-Hong R. Jiang
Comprehensive Search for ECO Rectification Using Symbolic Sampling. DAC (2019)
Li-Cheng Chen, Jie-Hong R. Jiang
A Cube Distribution Approach to QBF Solving and Certificate Minimization. CP (2019)
Shih-Yu Chen, Jie-Hong R. Jiang, Shou-Hung Welkin Ling, Shih-Hao Liang, Mao-Cheng Huang
An approximation algorithm to the optimal switch control of reconfigurable battery packs. ASP-DAC (2019)
Nian-Ze Lee, Jie-Hong R. Jiang
Towards Formal Evaluation and Verification of Probabilistic Design. IEEE Trans. Computers 67 (8) (2018)
He-Teng Zhang, Jie-Hong R. Jiang
Cost-aware patch generation for multi-target function rectification of engineering change orders. DAC (2018)
Ai Quoc Dao, Nian-Ze Lee, Li-Cheng Chen, Mark Po-Hung Lin, Jie-Hong R. Jiang, Alan Mishchenko, Robert K. Brayton
Efficient computation of ECO patch functions. DAC (2018)
Siang-Yun Lee, Nian-Ze Lee, Jie-Hong R. Jiang
Canonicalization of threshold logic representation and its applications. ICCAD (2018)
Hung-En Wang, Shih-Yu Chen, Fang Yu, Jie-Hong R. Jiang
A symbolic model checking approach to the analysis of string and length constraints. ASE (2018)
Chia-Chih Chi, Jie-Hong R. Jiang
Logic synthesis of binarized neural networks for efficient circuit implementation. ICCAD (2018)
Nian-Ze Lee, Yen-Shi Wang, Jie-Hong R. Jiang
Solving Exist-Random Quantified Stochastic Boolean Satisfiability via Clause Selection. IJCAI (2018)
Nian-Ze Lee, Yen-Shi Wang, Jie-Hong R. Jiang
Solving Stochastic Boolean Satisfiability under Random-Exist Quantification. IJCAI (2017)
Cheng-Yu Shih, Chun-Hong Shih, Jie-Hong R. Jiang
Closing the Accuracy Gap of Static Performance Analysis of Asynchronous Circuits. DAC (2017)
Chun-Hong Shih, Jie-Hong R. Jiang
Criticality and Sensitivity Analysis for Incremental Performance Optimization of Asynchronous Pipelines. ASYNC (2017)
Nian-Ze Lee, Victor N. Kravets, Jie-Hong R. Jiang
Sequential engineering change order under retiming and resynthesis. ICCAD (2017)
Hung-En Wang, Kuan-Hua Tu, Jie-Hong R. Jiang, Natalia Kushik
Homing Sequence Derivation with Quantified Boolean Satisfiability. ICTSS (2017)
Chun-Ning Lai, Jie-Hong R. Jiang
Path-Specific Functional Timing Verification under Floating and Transition Modes of Operation. DAC (2017)
Hsiao-Lei Chien, Mei-Yen Chiu, Jie-Hong R. Jiang
A Gridless Approach to the Satisfiability of Self-Aligned Triple Patterning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (8) (2017)
Chun-Ning Lai, Jie-Hong R. Jiang, François Fages
Recombinase-based genetic circuit optimization. BioCAS (2017)
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) (2016)
Grace Wu, Yi-Tin Sun, Jie-Hong R. Jiang
Design partitioning for large-scale equivalence checking and functional correction. DAC (2016)
Yi-Hsiang Lai, Chi-Chuan Chuang, Jie-Hong R. Jiang
Scalable Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (11) (2016)
Hui-Ju Katherine Chiang, Chi-Yuan Liu, Jie-Hong R. Jiang, Yao-Wen Chang
Simultaneous EUV Flare Variation Minimization and CMP Control by Coupling-Aware Dummification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (4) (2016)
Nian-Ze Lee, Hao-Yuan Kuo, Yi-Hsiang Lai, Jie-Hong R. Jiang
Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits. ICCAD (2016)
Valeriy Balabanov, Shuo-Ren Lin, Jie-Hong R. Jiang
Flexibility and Optimization of QBF Skolem-Herbrand Certificates. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (9) (2016)
Kuan-Hua Tu, Tzu-Chien Hsu, Jie-Hong R. Jiang
QELL: QBF Reasoning with Extended Clause Learning and Levelized SAT Solving. SAT (2015)
Ting-Wei Chiang, Jie-Hong R. Jiang
Property-Directed Synthesis of Reactive Systems from Safety Specifications. ICCAD (2015)
Yi-Hsiang Lai, Chi-Chuan Chuang, Jie-Hong R. Jiang
A General Framework for Efficient Performance Analysis of Acyclic Asynchronous Pipelines. ICCAD (2015)
Nina Yevtushenko, Khaled El-Fakih, Tiziano Villa, Jie-Hong R. Jiang
Deriving Compositionally Deadlock-Free Components over Synchronous Automata Compositions. Comput. J. 58 (11) (2015)
Hui-Ju Katherine Chiang, Jie-Hong R. Jiang, François Fages
Reconfigurable neuromorphic computation in biochemical systems. EMBC (2015)
Ting-Wei Chiang, Kai-Hui Chang, Yen-Ting Liu, Jie-Hong R. Jiang
Scalable sequence-constrained retention register minimization in power gating design. DAC (2015)
Valeriy Balabanov, Hui-Ju Katherine Chiang, Jie-Hong R. Jiang
Henkin quantifiers and Boolean formulae: A certification perspective of DQBF. Theor. Comput. Sci. 523 (2014)
Valeriy Balabanov, Magdalena Widl, Jie-Hong R. Jiang
QBF Resolution Systems and Their Proof Complexities. SAT (2014)
Hui-Ju Katherine Chiang, Jie-Hong R. Jiang, François Fages
Building reconfigurable circuitry in a biochemical world. BioCAS (2014)
Nian-Ze Lee, Jie-Hong R. Jiang
Towards formal evaluation and verification of probabilistic design. ICCAD (2014)
Chi-Chuan Chuang, Yi-Hsiang Lai, Jie-Hong R. Jiang
Synthesis of PCHB-WCHB Hybrid Quasi-Delay Insensitive Circuits. DAC (2014)
Chi-Yuan Liu, Hui-Ju Katherine Chiang, Yao-Wen Chang, Jie-Hong R. Jiang
Simultaneous EUV Flare Variation Minimization and CMP Control with Coupling-Aware Dummification. DAC (2014)
Hui-Ju Katherine Chiang, François Fages, Jie-Hong R. Jiang, Sylvain Soliman
On the Hybrid Composition and Simulation of Heterogeneous Biochemical Models. CMSB (2013)
Tsung-Po Liu, Shuo-Ren Lin, Jie-Hong R. Jiang
Software Workarounds for Hardware Errors: Instruction Patch Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (12) (2013)
Ko-Lung Yuan, Chien-Yen Kuo, Jie-Hong R. Jiang, Meng-Yen Li
Encoding multi-valued functions for symmetry. ICCAD (2013)
Shin-Yann Ho, Shuo-Ren Lin, Ko-Lung Yuan, Chien-Yen Kuo, Kuan-Yu Liao, Jie-Hong R. Jiang, Chien-Mo James Li
Automatic test pattern generation for delay defects using timed characteristic functions. ICCAD (2013)
Kuan-Hua Tu, Jie-Hong R. Jiang
Synthesis of feedback decoders for initialized encoders. DAC (2013)
Kuan-Hsien Ho, Xin-Wei Shih, Jie-Hong R. Jiang
Clock rescheduling for timing engineering change orders. ASP-DAC (2012)
De-An Huang, Jie-Hong R. Jiang, Ruei-Yang Huang, Chi-Yun Cheng
Compiling program control flows into biochemical reactions. ICCAD (2012)
Hsiou-Yuan Liu, Yen-Cheng Chou, Chen-Hsuan Lin, Jie-Hong R. Jiang
Automatic Decoder Synthesis: Methods and Case Studies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (9) (2012)
Valeriy Balabanov, Jie-Hong R. Jiang
Unified QBF certification and its applications. Formal Methods Syst. Des. 41 (1) (2012)
Hsiou-Yuan Liu, Yen-Cheng Chou, Chen-Hsuan Lin, Jie-Hong R. Jiang
Towards completely automatic decoder synthesis. ICCAD (2011)
Valeriy Balabanov, Jie-Hong R. Jiang
Resolution Proofs and Skolem Functions in QBF Evaluation and Applications. CAV (2011)
Alan Mishchenko, Robert K. Brayton, Jie-Hong R. Jiang, Stephen Jang
Scalable don't-care-based logic optimization and resynthesis. ACM Trans. Reconfigurable Technol. Syst. 4 (4) (2011)
Chih-Fan Lai, Jie-Hong R. Jiang, Kuo-Hua Wang
BooM: a decision procedure for boolean matching with abstraction and dynamic learning. DAC (2010)
Chih-Fan Lai, Jie-Hong R. Jiang, Kuo-Hua Wang
Boolean matching of function vectors with strengthened learning. ICCAD (2010)
Kuan-Hsien Ho, Jie-Hong R. Jiang, Yao-Wen Chang
TRECO: dynamic technology remapping for timing engineering change orders. ASP-DAC (2010)
Jie-Hong R. Jiang
Quantifier Elimination via Functional Composition. CAV (2009)
Jie-Hong R. Jiang, Dah-Wei Chiou, Cheng-En Wu
Quantum Mechanical Search and Harmonic Perturbation. Quantum Inf. Process. 6 (5) (2007)
Jie-Hong R. Jiang, Jing-Yang Jou, Juinn-Dar Huang, Jung-Shian Wei
BDD based lambda set selection in Roth-Karp decomposition for LUT architecture. ASP-DAC (1997)