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Nian-Ze Lee
ORCID
Publication Activity (10 Years)
Years Active: 2014-2024
Publications (10 Years): 26
Top Topics
Formal Evaluation
Product Line
Model Checking
Sat Instances
Top Venues
ICCAD
CoRR
TACAS (3)
DAC
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Publications
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Po-Chun Chien
,
Nian-Ze Lee
CPV: A Circuit-Based Program Verifier.
TACAS (3)
(2024)
Marie-Christine Jakobs
,
Nian-Ze Lee
Summary of the Eighth International Workshop on CPAchecker(CPAchecker 2023).
ACM SIGSOFT Softw. Eng. Notes
49 (2) (2024)
Dirk Beyer
,
Po-Chun Chien
,
Nian-Ze Lee
Augmenting Interpolation-Based Model Checking with Auxiliary Invariants (Extended Version).
CoRR
(2024)
Zsófia Ádám
,
Dirk Beyer
,
Po-Chun Chien
,
Nian-Ze Lee
,
Nils Sirrenberg
Btor2-Cert: A Certifying Hardware-Verification Framework Using Software Analyzers.
TACAS (3)
(2024)
Dirk Beyer
,
Po-Chun Chien
,
Marek Jankola
,
Nian-Ze Lee
A Transferability Study of Interpolation-Based Hardware Model Checking for Software Verification.
Proc. ACM Softw. Eng.
1 (FSE) (2024)
Daniel Baier
,
Dirk Beyer
,
Po-Chun Chien
,
Marek Jankola
,
Matthias Kettl
,
Nian-Ze Lee
,
Thomas Lemberger
,
Marian Lingsch Rosenfeld
,
Martin Spiessl
,
Henrik Wachowitz
,
Philipp Wendler
CPAchecker 2.3 with Strategy Selection - (Competition Contribution).
TACAS (3)
(2024)
Salih Ates
,
Dirk Beyer
,
Po-Chun Chien
,
Nian-Ze Lee
MoXIchecker: An Extensible Model Checker for MoXI.
CoRR
(2024)
Dirk Beyer
,
Po-Chun Chien
,
Nian-Ze Lee
CPA-DF: A Tool for Configurable Interval Analysis to Boost Program Verification.
ASE
(2023)
Dirk Beyer
,
Po-Chun Chien
,
Nian-Ze Lee
Bridging Hardware and Software Analysis with Btor2C: A Word-Level-Circuit-to-C Translator.
TACAS (2)
(2023)
Dirk Beyer
,
Nian-Ze Lee
,
Philipp Wendler
Interpolation and SAT-Based Model Checking Revisited: Adoption to Software Verification.
CoRR
(2022)
Nian-Ze Lee
,
Jie-Hong R. Jiang
Constraint Solving for Synthesis and Verification of Threshold Logic Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
40 (5) (2021)
Nian-Ze Lee
,
Jie-Hong R. Jiang
Dependency Stochastic Boolean Satisfiability: A Logical Formalism for NEXPTIME Decision Problems with Uncertainty.
AAAI
(2021)
Jie-Hong R. Jiang
,
Victor N. Kravets
,
Nian-Ze Lee
Engineering Change Order for Combinational and Sequential Design Rectification.
DATE
(2020)
Nian-Ze Lee
,
Jie-Hong R. Jiang
Dependency Stochastic Boolean Satisfiability: A Logical Formalism for NEXPTIME Decision Problems with Uncertainty.
CoRR
(2019)
Siang-Yun Lee
,
Nian-Ze Lee
,
Jie-Hong R. Jiang
Searching Parallel Separating Hyperplanes for Effective Compression of Threshold Logic Networks.
ICCAD
(2019)
Victor N. Kravets
,
Nian-Ze Lee
,
Jie-Hong R. Jiang
Comprehensive Search for ECO Rectification Using Symbolic Sampling.
DAC
(2019)
Shaukat Ali
,
Paolo Arcaini
,
Ichiro Hasuo
,
Fuyuki Ishikawa
,
Nian-Ze Lee
Towards a Framework for the Analysis of Multi-Product Lines in the Automotive Domain.
VaMoS
(2019)
Nian-Ze Lee
,
Paolo Arcaini
,
Shaukat Ali
,
Fuyuki Ishikawa
Stability analysis for safety of automotive multi-product lines: a search-based approach.
GECCO
(2019)
Akihisa Yamada
,
Clovis Eberhart
,
Fuyuki Ishikawa
,
Nian-Ze Lee
Scenario Sampling for Cyber Physical Systems using Combinatorial Testing.
ICST Workshops
(2019)
Nian-Ze Lee
,
Jie-Hong R. Jiang
Towards Formal Evaluation and Verification of Probabilistic Design.
IEEE Trans. Computers
67 (8) (2018)
Ai Quoc Dao
,
Nian-Ze Lee
,
Li-Cheng Chen
,
Mark Po-Hung Lin
,
Jie-Hong R. Jiang
,
Alan Mishchenko
,
Robert K. Brayton
Efficient computation of ECO patch functions.
DAC
(2018)
Siang-Yun Lee
,
Nian-Ze Lee
,
Jie-Hong R. Jiang
Canonicalization of threshold logic representation and its applications.
ICCAD
(2018)
Nian-Ze Lee
,
Yen-Shi Wang
,
Jie-Hong R. Jiang
Solving Exist-Random Quantified Stochastic Boolean Satisfiability via Clause Selection.
IJCAI
(2018)
Nian-Ze Lee
,
Yen-Shi Wang
,
Jie-Hong R. Jiang
Solving Stochastic Boolean Satisfiability under Random-Exist Quantification.
IJCAI
(2017)
Nian-Ze Lee
,
Victor N. Kravets
,
Jie-Hong R. Jiang
Sequential engineering change order under retiming and resynthesis.
ICCAD
(2017)
Nian-Ze Lee
,
Hao-Yuan Kuo
,
Yi-Hsiang Lai
,
Jie-Hong R. Jiang
Analytic approaches to the collapse operation and equivalence verification of threshold logic circuits.
ICCAD
(2016)
Nian-Ze Lee
,
Jie-Hong R. Jiang
Towards formal evaluation and verification of probabilistic design.
ICCAD
(2014)